Ultra high resolution liquid crystal display having a compensating thin film transistor at each pixel

A thin film transistor substrate, comprising:

• gate lines running in horizontal direction and data lines running in vertical direction which define a plurality of pixel areas on a substrate;
• a first gate electrode and a second gate electrode formed by dividing any one gate line disposed at any one of an upper side of a second pixel area and a lower side of a first pixel area;
• a first thin film transistor connected to the first gate electrode;
• and
• a second thin film transistor connected to the first thin film transistor and the second gate electrode,
• wherein the first and second thin film transistors provide a drive signal to a first pixel electrode disposed at the first pixel area such that a source area of the first thin film transistor is in the second pixel area and a drain area of the second thin film transistor is in the first pixel area, and wherein a drain area of the first thin film transistor and a source area of the second thin film transistor are positioned between the first gate and second gate electrodes in a planar view.