Hybrid bonding with uniform pattern density
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsSzu-Ying Chen, Dun-Nian Yaung
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Abstract
A chip includes a semiconductor substrate, integrated circuits with at least portions in the semiconductor substrate, and a surface dielectric layer over the integrated circuits. A plurality of metal pads is distributed substantially uniformly throughout substantially an entirety of a surface of the chip. The plurality of metal pads has top surfaces level with a top surface of the surface dielectric layer. The plurality of metal pads includes active metal pads and dummy metal pads. The active metal pads are electrically coupled to the integrated circuits. The dummy metal pads are electrically decoupled from the integrated circuits.
Claims20
An integrated circuit structure comprising:
- a first chip comprising:
- a semiconductor substrate;
- first integrated circuits with at least portions in the semiconductor substrate;
- a first surface dielectric layer over the first integrated circuits;
- and
- a first plurality of metal pads distributed substantially uniformly throughout substantially an entire top surface of the first chip, wherein the first plurality of metal pads comprises top surfaces level with a top surface of the first surface dielectric layer, and wherein the first plurality of metal pads comprises:
- first active metal pads electrically coupled to the first integrated circuits;
- and
- first dummy metal pads electrically decoupled from the first integrated circuits;
- and
- a seal ring comprising edges adjacent to respective edges of the first chip, wherein one of the first dummy metal pads overlaps the seal ring.
An integrated circuit structure comprising:
- a first chip comprising:
- a first surface dielectric layer;
- and
- a first plurality of metal pads uniformly distributed throughout substantially an entire top surface of the first chip, wherein the first plurality of metal pads comprises:
- first active metal pads in the first surface dielectric layer;
- and
- first dummy metal pads in the first surface dielectric layer;
- and
- a second chip over and bonded to the first chip through hybrid bonding, wherein the second chip comprises:
- a second surface dielectric layer physically contacting and bonded to the first surface dielectric layer;
- and
- a second plurality of metal pads comprising:
- second active metal pads physically contacting and bonded to the first active metal pads with a one-to-one correspondence;
- and
- second dummy metal pads physically contacting and bonded to the first dummy metal pads with a one-to-one correspondence.
An integrated circuit structure comprising:
- a first chip comprising:
- an integrated circuit, wherein the integrated circuit comprises an array;
- a first surface dielectric layer over the array;
- and
- a first plurality of metal pads uniformly distributed throughout an entirety of the first surface dielectric layer, wherein the first plurality of metal pads comprises:
- first active metal pads electrically coupled to the integrated circuit;
- a plurality of metal vias underlying and joined to respective ones of the first active metal pads;
- first dummy metal pads electrically decoupled from all integrated circuit devices in the first chip, wherein bottom surfaces of the first dummy metal pads are in contact with top surfaces of an underlying dielectric material;
- and
- a second chip over and bonded to the first chip through hybrid bonding, wherein the second chip is an Application Specific Integrated Circuit (ASIC) chip, and wherein the second chip comprises:
- a second surface dielectric layer physically contacting the first surface dielectric layer;
- and
- a second plurality of metal pads uniformly distributed throughout the second surface dielectric layer, wherein the second plurality of metal pads comprises:
- second active metal pads physically contacting the first active metal pads;
- second dummy metal pads physically contacting the first dummy metal pads;
- and
- a third plurality of metal pads underlying and in contact with top surfaces of respective ones of the second plurality of metal pads.
Dependencies are inferred from the claim text.