Method and circuit for shortening latency of Chien'S search algorithm for BCH codewords

A circuit for shortening latency of Chien's search, comprising:

• a plurality of calculating units, each iteratively substituting a variable to a specified power of an error-location polynomial having maximum power of t with a nonzero element, k, in GF(2m), for multiplying a corresponding coefficient of the error-location polynomial by k to the specified power as a cyclic product and outputting the cyclic product, wherein k changes from αp+1 to αn sequentially for each iterative calculation, wherein n is a codelength of a BCH codeword and equals 2m−1, p is a number of successive zeroes from the first bit of the BCH codeword and m is a positive integer;
• and
• a finite adder for summing a constant coefficient of the error-location polynomial and all cyclic products outputted from the calculating units in the same iterative calculation as a judging factor.

A circuit for shortening latency of Chien's search, comprising:

• a plurality of calculating units, each iteratively substituting a variable to a specified power of an error-location polynomial having maximum power of t with a nonzero element, k, in GF(2m), for simultaneously multiplying a corresponding coefficient of the error-location polynomial by k, changing from αp+(j−1)s+1 to αp+js, to the specified power as cyclic products in the jth iterative calculation and outputting s cyclic products in the jth iterative calculation, wherein n is a codelength of a BCH codeword and equals 2m−1, p is a number of successive zeroes from the first bit of the BCH codeword, m and j are positive integers, s is a number of sets of parallel computing and operation terminates when k runs to αn;
• and
• s finite adders, each summing a constant of the error-location polynomial and all cyclic products for one specified k outputted from the calculating units in the same iterative calculation as a judging factor.