Fully automated. high throughput, configurable digital design internal functional node probing mechanism and method
AssigneeTexas Instruments Incorporated
InventorsSaket Jalan, Mohammed Nabeel
Life of this patent
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Abstract
A device includes a plurality of functional logic blocks, a cascaded arrangement of multiplexers and a digital counter. Each of the plurality of functional logic blocks outputs a signals corresponding to nodes to be tested therein. The cascaded arrangement of multiplexers are arranged such that any of the outputs from any of the plurality of functional logic blocks may be selected for output. The digital counter is operable to control the cascaded arrangement of multiplexers so as to output signals from the functional logic blocks based on a counted signal.
Claims20
A device comprising:
- a first functional logic block having a first functional block first output line and a first function block second output line;
- a second functional logic block having a second functional block first output line and a second function block second output line;
- a third functional logic block having a third functional block first output line and a third function block second output line;
- a fourth functional logic block having a fourth functional block first output line and a fourth function block second output line;
- a first level of multiplexers comprising a first first-level multiplexer, a second first-level multiplexer, a third first-level multiplexer and a fourth first-level multiplexer, the first first-level multiplexer comprising a first two selectable inputs and a first output, the second first-level multiplexer comprising a second two selectable inputs and a second output, the third first-level multiplexer comprising a third two selectable inputs and a third output, the fourth first-level multiplexer comprising a fourth two selectable inputs and a fourth output, one of the first two selectable inputs being connected to the first functional block first output line, the other of the first two selectable inputs being connected to the first function block second output line, one of the second two selectable inputs being connected to the second functional block first output line, the other of the second two selectable inputs being connected to the second function block second output line, one of the third two selectable inputs being connected to the third functional block first output line, the other of the third two selectable inputs being connected to the third function block second output line, one of the fourth two selectable inputs being connected to the fourth functional block first output line, the other of the fourth two selectable inputs being connected to the fourth function block second output line,
- a second level of multiplexers comprising a first second-level multiplexer and a second second-level multiplexer, the first second-level multiplexer comprising a fifth two selectable inputs and a fifth output, the second first-level multiplexer comprising a sixth two selectable inputs and a sixth output;
- and
- a digital counter comprising a first select output and a second select output, the first select output being operable to provide a first select signal to the first first-level multiplexer, to the second first-level multiplexer, to the third first-level multiplexer and to the fourth first-level multiplexer, the second select output being operable to provide a second select signal to the first second-level multiplexer and to the second second-level multiplexer.
A method comprising:
- providing a first functional logic block having a first functional block first output line and a first function block second output line;
- providing a second functional logic block having a second functional block first output line and a second function block second output line,
- providing a from a third functional logic block having a third functional block first output line and a third function block second output line;
- providing a fourth functional logic block having a fourth functional block first output line and a fourth function block second output line;
- providing a first level of multiplexers comprising a first first-level multiplexer, a second first-level multiplexer, a third first-level multiplexer and a fourth first-level multiplexer, the first first-level multiplexer comprising a first two selectable inputs and a first output, the second first-level multiplexer comprising a second two selectable inputs and a second output, the third first-level multiplexer comprising a third two selectable inputs and a third output, the fourth first-level multiplexer comprising a fourth two selectable inputs and a fourth output, one of the first two selectable inputs being connected to the first functional block first output line, the other of the first two selectable inputs being connected to the first function block second output line, one of the second two selectable inputs being connected to the second functional block first output line, the other of the second two selectable inputs being connected to the second function block second output line, one of the third two selectable inputs being connected to the third functional block first output line, the other of the third two selectable inputs being connected to the third function block second output line, one of the fourth two selectable inputs being connected to the fourth functional block first output line, the other of the fourth two selectable inputs being connected to the fourth function block second output line,
- providing a second level of multiplexers comprising a first second-level multiplexer and a second second-level multiplexer, the first second-level multiplexer comprising a fifth two selectable inputs and a fifth output, the second first-level multiplexer comprising a sixth two selectable inputs and a sixth output;
- providing, via a first select output of a digital counter, a first select signal to the first first-level multiplexer, to the second first-level multiplexer, to the third first-level multiplexer and to the fourth first-level multiplexer;
- and
- providing, via a second select output of the digital counter, a second select signal to the first second-level multiplexer and to the second second-level multiplexer.
Dependencies are inferred from the claim text.