A load including negative resistance, comprising:
- a first signal end, operable to receive a first signal including a first AC (alternating current) component and a first DC (direct current) component;
- a second signal end, operable to receive a second signal including a second AC component and a second DC component;
- a resonant circuit, coupled between the first and second signal ends, including an inductor and a capacitor connected in parallel;
- and
- a negative resistance generator, including:
- a first transistor, including a first high voltage-level electrode, a first low voltage-level electrode, and a first gate, in which the first high voltage-level electrode connects with the first signal end;
- a second transistor, including a second high voltage-level electrode, a second low voltage-level electrode, and a second gate, in which the second high voltage-level electrode connects with the second signal end;
- a power source circuit, one end of the power source circuit coupled with the first and second low voltage-level electrodes, and another end of the power source circuit coupled with a voltage end;
- a first DC level setting circuit, coupled between the first signal end and the second gate, operable to provide a second gate voltage for the second gate according to a first DC voltage and the first AC component, in which the second gate voltage is lower than the voltage of the first signal and the first DC level setting circuit comprises:
- a third transistor, including a third high voltage-level electrode, a third low voltage-level electrode, and a third gate, in which the third high voltage-level electrode connects with a load circuit, the third low voltage-level electrode connects with the second gate, the third gate connects with the first signal end, and the voltage difference between the voltages of the third gate and the third low voltage-level electrode is the first DC voltage;
- and
- a first current source circuit, including one end coupled with the third low voltage-level electrode and another end coupled with a first voltage end, operable to determine an active region of the third transistor in conjunction with the first signal and the load circuit, and
- a second DC level setting circuit, coupled between the second signal end and the first gate, operable to provide a first gate voltage for the first gate according to a second DC voltage and the second AC component, in which the first gate voltage is lower than the voltage of the second signal and the second DC level setting circuit comprises:
- a fourth transistor, including a fourth high voltage-level electrode, a fourth low voltage-level electrode, and a fourth gate, in which the fourth high voltage-level electrode connects with the load circuit, the fourth low voltage-level electrode connects with the first gate, the fourth gate connects with the second signal end, and the voltage difference between the voltages of the fourth gate and the fourth low voltage-level electrode is the second DC voltage;
- and
- a second current source circuit, including one end coupled with the fourth low voltage-level electrode and another end coupled with a second voltage end, operable to determine an active region of the fourth transistor in conjunction with the second signal and the load circuit,
- wherein the first gate voltage is equal to the voltage of the second signal subtracting the second DC voltage, and the second gate voltage is equal to the voltage of the first signal subtracting the first DC voltage.