Stacked bias I-V regulation

A circuit comprising:

• at least one field effect transistor (FET) device including a drain terminal, a gate terminal and a source terminal;
• a voltage divider network including a plurality of resistors;
• at least one operation amplifier provided for the at least one FET device, where the operational amplifier includes a first input terminal, a second input terminal and an output terminal, and where the output terminal is electrically coupled to a gate terminal of the FET device, the first input terminal is electrically coupled to the source terminal of the FET device and the second input terminal is electrically coupled to the voltage divider network so that the source terminal provides a feedback voltage to the operational amplifier that controls a voltage applied to the gate terminal of the FET device;
• a source resistor electrically coupled to the source terminal of the FET device;
• and
• a voltage source electrically coupled across the voltage divider network and providing the voltage that is divided, wherein the at least one FET device is a plurality of stacked FET devices where a source terminal of at least one of the FET devices in the stack is electrically coupled to the drain terminal of another FET device in the stack, and wherein the at least operational amplifier is a plurality of operational amplifiers where one operational amplifier is provided for each FET device.

A RF amplifier circuit comprising:

• a plurality of stacked field effect transistor (FET) devices each including a drain terminal, a gate terminal and a source terminal;
• a voltage divider network including a plurality of resistors;
• a plurality of operational amplifiers where a separate one of the operational amplifiers is provided for each FET device in the stack, each operational amplifier including a first input terminal, a second input terminal and an output terminal, where the output terminal for a particular operational amplifier is electrically coupled to gate terminal of a particular FET device, the first input terminal of each operational amplifier is electrically coupled to the source terminal of the particular FET device and the second input terminal of each operational amplifier is electrically coupled to the voltage divider network;
• a source resistor electrically coupled to the source terminal of the bottom FET device in the stack;
• and
• a voltage source electrically coupled across the voltage divider network and providing the voltage that is divided.