Average current controller, average current control method and buck converter using the average current controller

A buck converter using an average current controller, comprising:

• an average current controller for generating a TAVG (an average switching period) pulse signal by comparing a level of current flowing into a main switch of the buck converter when a current level of the main switch reaches an average current level, performing the generation of capacitor charging/discharging signal CH_ON by using the TAVG signal and charging/discharging a capacitor, and generating a corresponding signal by determining the +/− state of a voltage Vc between both ends of the capacitor charged/discharged during one period;
• and
• a buck converter unit for turning off the main switch by resetting an SR latch when a level of current flowing in the main switch is above a level of an output signal from the average current by comparing a level of an output signal from the average current to a level of current flowing in the main switch,
• wherein the average current controller controls in such a way that T2+Toff/2=T/2 (T2:
• a time when the current level of the main switch reaches a peak current level from the average current level, Toff:
• a continuation time of the main switch off state, and T:
• a switching period of the main switch), and
• wherein the average current controller includes:
• a first comparator for generating a high H signal when a main switch current of the buck converter unit reaches an average current level;
• a multivibrator for generating a TAVG (an average switching period) pulse signal by receiving a high H signal outputted from the first comparator;
• a timing generator for generating a signal CH_ON to charge/discharge a capacitor by using at least the TAVG pulse signal;
• an integrator circuit unit for charging/discharging the capacitor by receiving the capacitor charging/discharging signal CH_ON generated from the timing generator and a capacitor charging/discharging current from the outside;
• a second comparator for outputting a corresponding signal by determining whether a voltage Vc between both ends of the capacitor charged/discharged during a period is a positive(+) or a negative(−);
• an up/down counter for increasing or decreasing a counting value by synchronizing a clock according to an output of the second comparator;
• and
• a digital/analog converter for outputting by converting an output (a digital signal) of the up/down counter into an analog signal, and
• wherein the timing generator includes:
• a first AND gate for performing a logic AND operation by receiving a gate driving signal Q outputted from the SR latch of the converter unit and a signal delayed during a predetermined time (Td1+Td3) by the gate driving signal;
• an inverter (NOT gate) for outputting a signal of an opposite value by receiving a HTOFF signal;
• an OR gate for performing an OR operation by receiving an output signal of the OR gate and a signal DQ delayed during a predetermined time (Td1+Td3) by the gate driving signal;
• and
• a D flip-flop for outputting by being delayed at a predetermined time by receiving the output signal of the OR gate and the TAVG signal.

An average current control method by using an average current controller which is constituted of a first comparator, a multivibrator, a timing generator, an integrator circuit unit, a second comparator, an up/down counter and a digital/analog converter, comprising:

• determining whether a current level of a main switch of a buck converter reaches an average current level or not by comparing an average current level and a current level flowing into the main switch of the buck converter to the first comparator;
• generating a TAVG (an average switching period) signal by the multivibrator when a main switch current level of a buck converter reaches an average current level as a result of the above determination;
• generating a signal (CH_ON) for charging/discharging a capacitor using at least the TAVG signal by the timing generator;
• charging/discharging the capacitor by receiving a capacitor charging/discharging signal (CH_ON) generated from the timing generator by the integrator circuit unit and a capacitor charging/discharging current from the outside;
• and
• outputting a corresponding signal by determining a +/− state of a voltage Vc between both ends of the capacitor charged/discharged during a period by the second comparator,
• wherein the average current controller controls in such a way that T2+Toff/2=T/2 (T2:
• a time when the current level of the main switch reaches a peak current level from the average current level, Toff:
• a continuation time of the main switch off state, and T:
• a switching period of the main switch), and
• wherein the signal (CH_ON) for charging/discharging the capacitor is generated by using an HTOFF signal which means to reach a half of the TAVG signal, a gate driving signal Q and the Toff.