Power converter control circuit

A control circuit for a power converter, for configuring a power stage circuit to provide power to a load, comprising:

• a feedback circuit, configured to operably generate a first gain signal and a second gain signal according to a voltage sensing signal coupled with a load and generate a feedback signal according to the first gain signal and the second gain signal;
• and
• a pulse width modulation signal generating circuit, coupled with the feedback circuit, configured to operably configure the power stage circuit according to the feedback signal and a reference signal;
• wherein the feedback circuit and the pulse width modulation signal generating circuit are configured in the same integrated circuit package,
• wherein the feedback circuit further comprises:
• a first transconductance circuit, comprising a first output terminal for coupling with a first terminal of a first resistor and comprising a second terminal for coupling with a first predetermined voltage level, configured to operably generate a first transconductance current signal to be the first gain signal according to the voltage sensing signal;
• and
• a voltage controlled current generating circuit, coupled with the first terminal of the first resistor, configured to operably generate a first compensation current signal to be the second gain signal according to the voltage sensing signal;
• wherein the feedback circuit generate the feedback signal at the first terminal of the first resistor according to the first transconductance current signal and the first compensation current signal, and
• wherein the voltage controlled current generating circuit further comprises:
• a current mirror circuit comprising a first terminal configured to operably provide a first current signal and comprising a second terminal configured to operably provide a second current signal;
• a transistor comprising a first terminal, a second terminal and a control terminal wherein the first terminal of the transistor is coupled with the first terminal of the current mirror circuit and the control terminal of the transistor is configured to operably receive the voltage sensing signal;
• a capacitor comprising a first terminal for coupling with the second terminal of the transistor and comprising a second terminal for coupling with a fourth predetermined voltage level;
• a first current source circuit, comprising a first terminal coupled with the second terminal of the transistor and comprising a second terminal for coupling with the fourth predetermined voltage level, configured to operably generate a first reference current signal;
• a second current source circuit, comprising a first terminal coupled with the second terminal of the current mirror circuit and comprising a second terminal for coupling with the fourth predetermined voltage level, configured to operably generate a second reference current signal;
• wherein the voltage controlled current generating circuit generate the first compensation current signal at a node coupled between the second terminal of the current mirror circuit and the first terminal of the second current source circuit;
• the transistor is configured to operably output a third current signal from the second terminal of the transistor to the capacitor;
• the second reference current signal is configured to be k times the first reference signal;
• the second current signal is configured to be k times the first current signal;
• and the first compensation current signal is configured to be k times the third current signal.