Semiconductor device and manufacturing method thereof
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsShunpei Yamazaki, Tatsuya Honda
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Abstract
One object of the present invention is to provide a structure of a transistor including an oxide semiconductor in a channel formation region in which the threshold voltage of electric characteristics of the transistor can be positive, which is a so-called normally-off switching element, and a manufacturing method thereof. A second oxide semiconductor layer which has greater electron affinity and a smaller energy gap than a first oxide semiconductor layer is formed over the first oxide semiconductor layer. Further, a third oxide semiconductor layer is formed to cover side surfaces and a top surface of the second oxide semiconductor layer, that is, the third oxide semiconductor layer covers the second oxide semiconductor layer.
Claims26
A semiconductor device comprising:
- a first oxide semiconductor layer;
- a second oxide semiconductor layer over the first oxide semiconductor layer;
- a third oxide semiconductor layer provided over the second oxide semiconductor layer to cover side surfaces of the second oxide semiconductor layer;
- a source electrode layer and a drain electrode layer over the third oxide semiconductor layer;
- a gate insulating film over the source electrode layer and the drain electrode layer;
- and
- a gate electrode layer over the gate insulating film to overlap with the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer,
- wherein the second oxide semiconductor layer has a smaller energy gap than the first oxide semiconductor layer and the third oxide semiconductor layer,
- wherein the third oxide semiconductor layer comprises crystals of which c-axes are aligned substantially in one direction.
A semiconductor device comprising:
- a first oxide semiconductor layer;
- a second oxide semiconductor layer over the first oxide semiconductor layer;
- a third oxide semiconductor layer provided over the second oxide semiconductor layer to cover side surfaces of the second oxide semiconductor layer;
- a gate electrode layer overlapped with the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer;
- and
- a gate insulating film between the gate electrode layer and a stack of the first, second and third oxide semiconductor layers,
- wherein the second oxide semiconductor layer has a smaller energy gap than the first oxide semiconductor layer and the third oxide semiconductor layer, and
- wherein the third oxide semiconductor layer comprises crystals of which c-axes are aligned substantially in one direction.
A semiconductor device comprising:
- a first oxide semiconductor layer;
- a second oxide semiconductor layer over the first oxide semiconductor layer;
- a third oxide semiconductor layer provided over the second oxide semiconductor layer to cover side surfaces of the second oxide semiconductor layer;
- a source electrode layer and a drain electrode layer over the third oxide semiconductor layer, each of the source electrode layer and the drain electrode layer comprising a first conductive layer comprising tantalum nitride and a second conductive layer comprising copper, wherein the first conductive layers are in direct contact with the third oxide semiconductor layer;
- a gate insulating film over the source electrode layer and the drain electrode layer;
- and
- a gate electrode layer over the gate insulating film to overlap with the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer,
- wherein the second oxide semiconductor layer has a smaller energy gap than the first oxide semiconductor layer and the third oxide semiconductor layer.
Dependencies are inferred from the claim text.