Semiconductor device and fabrication method for the same
AssigneePannova Semic, LLC
InventorsTsutomu Oosuka, Hisashi Ogawa, Yoshihiro Sato
Life of this patent
Estimating the term…
Abstract
The semiconductor device includes: a transistor having a gate electrode formed on a semiconductor substrate and first and second source/drain regions formed in portions of the semiconductor substrate on both sides of the gate electrode; a gate interconnect formed at a position opposite to the gate electrode with respect to the first source/drain region; and a first silicon-germanium layer formed on the first source/drain region to protrude above the top surface of the semiconductor substrate. The gate interconnect and the first source/drain region are connected via a local interconnect structure that includes the first silicon-germanium layer.
Claims19
A semiconductor device comprising:
- a gate electrode formed on an active region of a substrate;
- a first silicon-germanium layer formed in a first recess provided in a portion of the active region;
- a first silicide layer formed on the first silicon-germanium layer;
- a gate interconnect formed on a region of the active region opposite side of the gate electrode to the first silicon-germanium layer;
- a first contact plug electrically connected to the first silicide layer and the gate interconnect;
- a first side wall formed on one side surface of the gate interconnect closer to the first silicon-germanium layer;
- and
- a second side wall formed on another side surface of the gate interconnect opposite to the first silicon-germanium layer, wherein:
- a top position of a part of the first side wall which is located under the first contact plug is lower than a top position of the second side wall, and
- no silicon-germanium layer is formed on the gate electrode.
Dependencies are inferred from the claim text.