Static memory cell and formation method thereof

A method of forming a static memory cell, comprising:

• providing a semiconductor substrate including a first region,
• forming a first fin part on the semiconductor substrate in the first region;
• forming an isolation layer on the semiconductor substrate, having a top surface lower than a top surface of the first fin part to cover a lower portion of a sidewall surface of the first fin part;
• forming a first dummy gate structure across a length of the first fin part;
• forming a first sidewall spacer on the sidewall surface of the first dummy gate structure and on a surface portion of the isolation layer;
• forming a dielectric layer on the isolation layer and having a top surface coplanar with a top surface of the first dummy gate structure;
• forming a mask layer on the dielectric layer and on the top surface of the first dummy gate structure, wherein the mask layer contains a first opening to expose the top surface of the first dummy gate structure;
• removing the first dummy gate structure through the first opening to form a first trench exposing a portion of a surface of the first fin part and the sidewall spacer located on both sides of the first fin part;
• removing a portion of a thickness of the isolation layer at the bottom of the first trench through the first opening to form a second trench exposing a portion of sidewalls of the first fin part beneath the top surface of the isolation layer;
• and
• forming a first gate structure by filling up the first trench and the second trench in the first region.