Method for fabricating vertically stacked nanowires for semiconductor applications
AssigneeApplied Materials, Inc.
InventorsYing Zhang, Hua Chung
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AssigneeApplied Materials, Inc.
InventorsYing Zhang, Hua Chung
Estimating the term…
Embodiments of the present disclosure provide methods for forming nanowire structures with desired materials for three dimensional (3D) stacking of fin field effect transistor (FinFET) for semiconductor chips. In one embodiment, a method of forming nanowire structures on a substrate includes forming a multi-material layer on a substrate, wherein the multi-material layer includes repeating pairs of a first layer and a second layer, the substrate further comprising a patterned hardmask layer disposed on the multi-material layer, etching the multi-material layer through openings defined by the patterned hardmask layer to expose sidewalls of the first and the second layer of the multi-material layer, and laterally and selectively etching the second layer from the substrate.
A method of forming nanowire structures on a substrate comprising:
A method of forming nanowire structures on a substrate comprising:
A method of forming nanowire structures on a substrate comprising:
Dependencies are inferred from the claim text.