Vertical DMOS transistor
AssigneeAlpha and Omega Semiconductor Incorporated
InventorHideaki Tsuchiko
Life of this patent
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Abstract
A transistor includes a semiconductor body; a body region of a first conductivity type formed in the semiconductor body; a gate electrode formed partially overlapping the body region and insulated from the semiconductor body by a gate dielectric layer; a source diffusion region of a second conductivity type formed in the body region on a first side of the gate electrode; a trench formed in the semiconductor body on a second side, opposite the first side, of the gate electrode, the trench being lined with a sidewall dielectric layer; and a doped sidewall region of the second conductivity type formed in the semiconductor body along the sidewall of the trench where the doped sidewall region forms a vertical drain current path for the transistor.
Claims7
A method for forming a transistor, comprising:
- providing a semiconductor body;
- forming a body region of a first conductivity type in the semiconductor body;
- forming a gate electrode partially overlapping the body region, the gate electrode being insulated from the semiconductor body by a gate dielectric layer;
- forming a source diffusion region of a second conductivity type in the body region on a first side of the gate electrode;
- forming a trench in the semiconductor body on a second side, opposite the first side, of the gate electrode;
- forming a sidewall dielectric layer lining the sidewall only of the trench without filling the trench;
- and
- implanting dopants of the second conductivity type in the semiconductor body along the sidewall of the trench to form a doped sidewall region in the semiconductor body along the sidewall of the trench, the doped sidewall region forming a vertical drain current path in the semiconductor body adjacent the trench for the transistor.
Dependencies are inferred from the claim text.