Thin film transistor array panel and method of manufacturing the panel

A manufacturing method of a thin film transistor array panel, the method comprising:

• forming a gate line on a substrate, the gate line including a first connection member at a gate driver region and a gate electrode at a display area;
• forming a gate insulating layer on the substrate, the gate line, and the first connection member;
• forming a semiconductor layer on the gate insulating layer;
• forming a first contact hole by etching the semiconductor layer and the gate insulating layer by using a photosensitive film pattern to expose the first connection member;
• forming a data line on the gate insulating layer and the semiconductor layer, the data line including a drain electrode, a source electrode, and a second connection member connected to the first connection member exposed through the first contact hole;
• forming a passivation layer on the data line, the source electrode, the drain electrode, and the second connection member;
• and
• forming a pixel electrode on the passivation layer, the pixel electrode being electrically connected to the drain electrode,
• wherein the forming of the first contact hole is performed by using dry etching.