Semiconductor field-effect transistor, memory cell and memory device
AssigneeMicron Technology, Inc.
InventorsPaolo Rolandi, Cristiano Calligaro, Luigi Pascucci
Life of this patent
Estimating the term…
Abstract
Semiconductor device formed by a first conductive strip of semiconductor material; a control gate region of semiconductor material, facing a channel portion of the first conductive strip, and an insulation region arranged between the first conductive strip and the control gate region. The first conductive strip includes a conduction line having a first conductivity type and a control line having a second conductivity type, arranged adjacent and in electrical contact with each other, and the conduction line forms the channel portion, a first conduction portion and a second conduction portion arranged on opposite sides of the channel portion.
Claims12
A method comprising:
- forming a conductive strip of semiconductor material, the conductive strip including a conduction line of a first conductivity type and a control line of a second opposing conductivity type, the conduction line being elevationally over and in electrical contact with the control line, and the conduction line including a channel portion, and a first conduction portion and a second conduction portion arranged on opposite sides of the channel portion;
- forming a control gate region of semiconductor material, facing the channel portion of the conductive strip;
- and
- forming an insulation region arranged between the conductive strip and the control gate region.
A method of forming a semiconductor construction, comprising:
- forming a first conductive strip of semiconductor material, the first conductive strip including a conduction line of a first conductivity type and a control line of a second opposing conductivity type, the conduction line and control line being adjacent and in electrical contact with each other, and the conduction line including a channel portion, and a first conduction portion and a second conduction portion arranged on opposite sides of the channel portion;
- forming a control gate region of semiconductor material over the channel portion of the first conductive strip;
- forming an insulation region arranged between the first conductive strip and the control gate region;
- and
- forming a second conductive strip extending transversely to said first conductive strip.
A method of forming a semiconductor construction comprising a plurality of transistors, the method comprising:
- forming a stack of materials including an oxide layer over a substrate, a doped bulk region over the oxide layer, and an opposingly doped conduction region over the bulk region, the conduction region comprising channel region, a first conductive portion on a first side of the channel region and a second conductive portion on an opposing second side of the channel region, wherein the bulk region and conduction region together form a first conductive strip;
- and
- forming a gate oxide region over the conduction region and a gate region over the gate oxide region, the gate region being comprised by a second conductive strip that is orthogonal relative to the first conductive strip.
Dependencies are inferred from the claim text.