Back to results
US 9,287,234 B2Granted
Dummy flip chip bumps for reducing stress
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsSheng-Yu Wu, Tin-Hao Kuo, Chita Chuang, Chen-Shien Chen
Life of this patent
Estimating the term…
Abstract
A device includes a metal pad over a substrate. A passivation layer includes a portion over the metal pad. A post-passivation interconnect (PPI) is electrically coupled to the metal pad, wherein the PPI comprises a portion over the metal pad and the passivation layer. A polymer layer is over the PPI. A dummy bump is over the polymer layer, wherein the dummy bump is electrically insulated from conductive features underlying the polymer layer.
Claims20
A method comprising:
- forming a first package component comprising:
- forming a first dielectric layer;
- and
- forming a dummy bump over the first dielectric layer, with an entirety of a bottom surface of the dummy bump contacting a top surface of the first dielectric layer;
- and
- bonding a second package component to the first package component, with the dummy bump in contact with the second package component, wherein after the bonding, a top surface of the dummy bump is in contact with a second dielectric layer in the second package component, with the first dielectric layer and the second dielectric layer contacting opposite surfaces of the dummy bump.
3 more elements
A method comprising:
- forming a polymer layer over a conductive feature;
- forming a first opening in the polymer layer to reveal the conductive feature;
- forming a blanket Under-Bump Metallurgy (UBM) layer, wherein the blanket UBM layer comprises a first portion extending into the first opening, and a second portion over a portion of the polymer layer, with the second portion of the UBM layer in contact with a top surface of the portion of the polymer layer;
- forming a mask layer over the polymer layer, wherein the mask layer comprises:
- a second opening, with the first opening and the second opening joined to each other;
- and
- a third opening over the portion of the polymer layer;
- and
- forming a metal bump and a dummy bump in the second opening and the third opening, respectively.
6 more elements
A method comprising:
- forming a first package component, wherein the forming the first package component comprises:
- forming a passivation layer comprising a portion over a metal pad;
- forming a post-passivation interconnect (PPI) electrically coupled to the metal pad, wherein the PPI comprises a portion over the metal pad and the passivation layer;
- forming a polymer layer over the PPI;
- forming an electrical connector over and electrically coupled to the PPI, wherein the electrical connector comprises a portion over a top surface of the polymer layer;
- and
- forming a dummy bump over the polymer layer, wherein the dummy bump is insulated from all conductive features under the polymer layer.
4 more elements
Dependencies are inferred from the claim text.