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US 9,287,167 B2Granted
Vertical type memory device
AssigneeSamsung Electronics Co., Ltd.
InventorsKwang Soo Seol, Seong Soon Cho, Byungjoo Go, Hongsoo Kim
Life of this patent
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Abstract
A method of fabricating a semiconductor device, comprising: forming a plurality of memory cell strings; coupling an interconnection to at least two of the memory cell strings; and coupling a bitline to the interconnection. The interconnection includes a body extending along a first direction and a protrusion protruding from the body along a second direction.
Claims20
A method of fabricating a semiconductor device, comprising:
- forming a plurality of memory cell strings on a substrate;
- coupling a single-body interconnection to at least two of the memory cell strings;
- and
- coupling a bitline to the single-body interconnection,
- wherein coupling the single-body interconnection to the at least two of the memory cell strings comprises forming the single-body interconnection including a body extending along a first direction and a protrusion protruding from the body along a second direction,
- wherein the first and second directions are substantially parallel to the substrate, and
- wherein the single-body interconnection has one end part coupled to one memory cell string and another end part coupled to another memory cell string.
4 more elements
A method of fabricating a semiconductor device, comprising:
- forming a plurality of vertically stacked memory cell strings;
- forming a single-body interconnection to couple at least two of the plurality of vertically stacked memory cell strings;
- and
- coupling a bitline to the interconnection,
- wherein coupling the single-body interconnection to the at least two of the memory cell strings comprises forming the single-body interconnection including a body extending along a first direction and a protrusion protruding from the body along a second direction,
- wherein the first and second directions are substantially perpendicular to a direction in which the memory cell strings are stacked, and
- wherein the single-body interconnection has one end part coupled to one memory cell string and another end part coupled to another memory cell string.
4 more elements
Dependencies are inferred from the claim text.