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US 9,287,166 B2Granted
Barrier for through-silicon via
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChen-Hua Yu, Wen-Chih Chiou, Weng-Jin Wu
Life of this patent
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Abstract
A system and a method for protecting vias is disclosed. An embodiment comprises forming an opening in a substrate. A barrier layer disposed in the opening including along the sidewalls of the opening. The barrier layer may include a metal component and an alloying material. A conductive material is formed on the barrier layer and fills the opening. The conductive material to form a via (e.g., TSV).
Claims13
A method comprising:
- forming on a first surface of a semiconductor substrate an integrated circuit device;
- forming over the first surface a dielectric layer;
- etching an opening through the dielectric layer and at least partially through the substrate, the opening having sidewalls;
- conformally forming a barrier layer on the sidewalls, wherein the barrier layer includes a composition having a metal component and a carbon alloying material at a concentration of no greater than about 15% of the barrier layer;
- and
- forming a conductor on the barrier layer, wherein the conductor completely fills the opening, the conductor having a top surface coplanar with a top surface of the dielectric layer and a bottom surface at a bottom surface of the opening proximate a second surface of the substrate.
3 more elements
A method comprising:
- forming at least one active device on a first surface of a semiconductor substrate;
- forming an interlevel dielectric layer (ILD) over the first surface and the at least one active device;
- forming a contact structure extending through the ILD and electrically contacting the at least one active device;
- etching an opening extending through the ILD and at least partially through the semiconductor substrate, the opening having sidewalls and a bottom, wherein a portion of the sidewalls in the ILD are substantially aligned with a portion of the sidewalls in the semiconductor substrate;
- forming a liner on the ILD and on the sidewalls and bottom of the opening;
- forming a
- barrier layer on the liner by depositing barrier material using a precursor composition having a metal component and a carbon alloying material, the carbon alloying material having a concentration of no greater than about 15% of the barrier material;
- forming an adhesion layer on the barrier layer;
- forming a seed layer on the adhesion layer and electroplating a conductor on the seed layer and wholly filling the opening;
- removing portions of a second surface of the semiconductor substrate to expose the conductor;
- and
- forming an electrical contact on at least one end of the conductor.
9 more elements
Dependencies are inferred from the claim text.