Re-crystallization for boosting stress in MOS device
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsRu-Shang Hsiao, Cing-Yao Chan, Chun-Ying Wang, Jen-Pan Wang
Life of this patent
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Abstract
A method includes forming a dummy gate stack over a semiconductor substrate, removing the dummy gate stack to form a recess, and implanting a portion of the semiconductor substrate through the recess. During the implantation, an amorphous region is formed from the portion of the semiconductor substrate. The method further includes forming a strained capping layer, wherein the strained capping layer extends into the recess. An annealing is performed on the amorphous region to re-crystallize the amorphous region. The strained capping layer is then removed.
Claims20
A method comprising:
- forming a dummy gate stack over a semiconductor substrate;
- removing the dummy gate stack thereby forming a recess;
- implanting a portion of the semiconductor substrate through the recess, wherein an amorphous region is formed from the portion of the semiconductor substrate;
- forming a strained capping layer, wherein the strained capping layer extends into the recess;
- performing an annealing on the amorphous region to re-crystallize the amorphous region;
- and then removing the strained capping layer.
A method comprising:
- forming a dummy gate stack over a semiconductor substrate;
- removing the dummy gate stack to form a recess;
- forming a source region and a drain region in the semiconductor substrate, wherein the source region and the drain region are on opposite sides of the dummy gate stack;
- implanting a portion of the semiconductor substrate through the recess to amorphize a portion of the semiconductor substrate, wherein an amorphous region is formed from the portion of the semiconductor substrate;
- forming a strained capping layer, wherein a portion of the strained capping layer extends into the recess, with a portion of the recess remaining after the strained capping layer is formed;
- performing an annealing on the amorphous region to re-crystallize the amorphous region;
- and then removing the strained capping layer.
A method comprising:
- forming a dummy gate stack over a semiconductor substrate;
- forming a source/drain region in the semiconductor substrate, wherein the source/drain region is adjacent to the dummy gate stack;
- forming a contact etch stop layer overlying the dummy gate stack and the source/drain region;
- forming an inter-layer dielectric over the contact etch stop layer;
- performing a chemical mechanical polish to expose the dummy gate stack;
- removing the dummy gate stack to form a recess in the inter-layer dielectric;
- implanting a portion of the semiconductor substrate through the recess, wherein an amorphous region is formed from the portion of the semiconductor substrate;
- forming a strained capping layer over the inter-layer dielectric;
- performing an annealing on the amorphous region to re-crystallize the amorphous region;
- after the annealing, removing the strained capping layer;
- forming a gate dielectric in the recess;
- and
- forming a gate electrode in the recess, wherein the gate electrode is over the gate dielectric.
Dependencies are inferred from the claim text.