Multiple edge enabled patterning
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMing-Feng Shieh, Ya Hui Chang, Ru-Gun Liu, Tsong-Hua Ou, Ken-Hsien Hsieh, Burn Jeng Lin
Life of this patent
Estimating the term…
Loading patent…
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMing-Feng Shieh, Ya Hui Chang, Ru-Gun Liu, Tsong-Hua Ou, Ken-Hsien Hsieh, Burn Jeng Lin
Estimating the term…
Provided is an alignment mark having a plurality of sub-resolution elements. The sub-resolution elements each have a dimension that is less than a minimum resolution that can be detected by an alignment signal used in an alignment process. Also provided is a semiconductor wafer having first, second, and third patterns formed thereon. The first and second patterns extend in a first direction, and the third pattern extend in a second direction perpendicular to the first direction. The second pattern is separated from the first pattern by a first distance measured in the second direction. The third pattern is separated from the first pattern by a second distance measured in the first direction. The third pattern is separated from the second pattern by a third distance measured in the first direction. The first distance is approximately equal to the third distance. The second distance is less than twice the first distance.
A method, comprising:
A method comprising:
A method comprising:
Dependencies are inferred from the claim text.