Planar III-V field effect transistor (FET) on dielectric layer
AssigneeInternational Business Machines Corporation
InventorsCheng-Wei Cheng, Edward W. Kiewra, Amlan Majumdar, Uzma Rana, Devendra K. Sadana, Kuen-Ting Shiu, Yanning Sun
Life of this patent
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Abstract
A method of forming a semiconductor substrate including a type III-V semiconductor material directly on a dielectric material that includes forming a trench in a dielectric layer, and forming a via within the trench extending from a base of the trench to an exposed upper surface of an underlying semiconductor including substrate. A III-V semiconductor material is formed extending from the exposed upper surface of the semiconductor substrate filling at least a portion of the trench.
Claims20
A method of forming a semiconductor device comprising:
- forming a trench in a dielectric layer, the dielectric layer being present on a semiconductor including substrate;
- forming a via at a perimeter of the trench, wherein the via extending from a base of the trench present at a depth within the dielectric layer to an exposed upper surface of the semiconductor including substrate;
- epitaxially forming a III-V semiconductor material extending from the exposed upper surface of the semiconductor including substrate filling at least a portion of the trench, the III-V semiconductor material filling the via;
- forming the semiconductor device on the III-V semiconductor material that is present in the trench, wherein an active region of the semiconductor device that is formed in the III-V semiconductor material is separated from the perimeter of the trench;
- removing the III-V semiconductor material from the via;
- and
- filling the via with a dielectric material.
A method of forming a semiconductor substrate comprising:
- forming a trench in a dielectric layer, the dielectric layer being present on a semiconductor including substrate;
- forming a via within the trench, wherein the via extending from a base of the trench present at a depth within the dielectric layer to an exposed upper surface of the semiconductor including substrate;
- epitaxially forming a III-V semiconductor material extending from the exposed upper surface of the semiconductor including substrate filling the via and at least a portion of the trench;
- removing the III-V semiconductor material from the via;
- and
- filling the via with a dielectric material.
An electrical device comprising:
- a base semiconductor layer of a silicon including material;
- a dielectric layer present on the base semiconductor layer;
- a III-V semiconductor material present in a trench in the dielectric layer, wherein the III-V semiconductor material is in direct contact with at least the dielectric layer at a base of the trench;
- a semiconductor device present on the III-V semiconductor material;
- and
- a via filled with a dielectric extending from the trench to the base semiconductor layer, the via being present at a perimeter of the trench that is separated from the active portion of the III-V semiconductor material of the semiconductor device.
Dependencies are inferred from the claim text.