Semiconductor device
AssigneeMicron Technology, Inc.
InventorShuichi Tsukada
Life of this patent
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Abstract
A semiconductor device including: a resistive memory element; a data line electrically coupled to the resistive memory element; a control line; a power supply line; and a control circuit including a first constant current element, a first transistor, and a second transistor. In the control circuit, the first transistor has a gate coupled to the data line, one of a source and a drain coupled to the first constant current element, and the other one of the source and the drain coupled to the power supply line. The second transistor has a gate coupled to one of the source and the drain of the first transistor, one of a source and a drain coupled to the data line, and the other one of the source and the drain coupled to the control line.
Claims20
A semiconductor device, comprising:
- a resistive memory element;
- a data line electrically coupled to the resistive memory element;
- a control line;
- a power supply line;
- and
- a control circuit comprising a first constant current element, a first transistor, and a second transistor,
- wherein, in the control circuit, the first transistor has a gate coupled to the data line, one of a source and a drain coupled to the first constant current element, and the other one of the source and the drain coupled to the power supply line, and
- wherein, in the control circuit, the second transistor has a gate coupled to one of the source and the drain of the first transistor, one of a source and a drain coupled to the data line, and the other one of the source and the drain coupled to the control line.
A semiconductor device, comprising:
- a plurality of resistive memory cells;
- a plurality of first data lines coupled to the resistive memory cells, respectively;
- a plurality of second data lines;
- a voltage generator configured to generate an internal voltage at an output node;
- a plurality of feedback circuits each coupled to a corresponding one of the first data lines, a corresponding one of the second data lines and the output node of the voltage generator, and being configured to drive the corresponding one of the second data lines in response to a potential of the corresponding one of the first data lines and the internal voltage.
Dependencies are inferred from the claim text.