Embedded DisplayPort system and method for controlling panel self refresh mode
AssigneeSilicon Works Co., Ltd.
InventorsYong Hwan Moon, Hong Jun Yang, Sang Ho Kim, Yong Woo Kim
Life of this patent
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Abstract
Provided are an embedded DisplayPort (eDP) system and a method for controlling a panel self refresh mode. The eDP system enters a panel self refresh (PSR) mode when an image to display is static in a general mode, and a sink device recovers a stream clock for displaying a static image in the PSR mode.
Claims20
An embedded DisplayPort (eDP) system comprising:
- a source device providing a link symbol clock, first stream data having a fixed value, and second stream data having an unfixed value;
- and
- a sink device configured to receive the link symbol clock, the first stream data, and the second stream data from the source device, store a number, as first stored stream data, based on an oscillator clock, the link symbol clock, and the first stream data, store a number, as second stored stream data, based on a stream clock, the oscillator clock, and the first stored stream data, wherein the source device is turned off in a panel self refresh mode and the sink device generates a recovered stream clock, the sink device comprises:
- an oscillator configured to provide the oscillator clock;
- a stream data regeneration block configured to output the oscillator clock, the first stored stream data, and the second stored stream data as a reference clock, first regenerated stream data, and second regenerated stream data in the panel self refresh mode;
- and
- a stream clock recovery block configured to recover the stream clock using the reference clock, the first regenerated stream data, and the second regenerated stream data to generate the recovered stream clock.
An eDP system comprising a timing controller configured to recover a stream clock,
- wherein the timing controller comprises:
- an oscillator configured to provide an oscillator clock;
- a stream data regeneration block configured to output a link symbol clock, first stream data, and second stream data, transmitted from a source device, store a number, as first stored stream data, based on the oscillator clock, the link symbol clock, and the first stream data, store a number, as second stored stream data, based on the stream clock, the oscillator clock, and the first stored stream data, and output the oscillator clock, the first stored stream data, and the second stored stream data as a reference clock, first regenerated stream data, and second regenerated stream data according to a panel mode signal in a panel self refresh mode;
- and
- a stream clock recovery block configured to recover the stream clock using the reference clock, the first regenerated stream data, and the second regenerated stream data.
An eDP system comprising a timing controller configured to generate a reference clock for recovering a stream clock,
- wherein the timing controller comprises:
- an oscillator configured to provide an oscillator clock;
- a first stored stream data generator configured to generate first stored stream data based on oscillator clock, a link symbol clock, and first stream data transmitted from a source device;
- a divider configured to divide the oscillator clock by the first stored stream data;
- a second stored stream data generator configured to generate second stored stream data based on a the stream clock and the divided clock outputted from the divider;
- a stream data buffer configured to store the first stored stream data and the second stored stream data and provide the second stored stream data to the divider;
- and
- a selection circuit configured to select and output the link symbol clock, the first stream data, and the second stream data as the reference clock, first regenerated stream data, and second regenerated stream data in a general mode and select and output the oscillator clock, the first stored stream data, and the second stored stream data stored in the stream data buffer as the reference clock, the first regenerated stream data, and the second regenerated stream data in response to a panel mode signal in a panel self refresh mode.
A method for controlling a panel self refresh mode of an eDP system, the method comprising:
- storing a number, as first stored stream data, based on an oscillator clock provided from an oscillator, a link symbol clock, and first stream data having a fixed value;
- storing a number, as second stored stream data, based on a stream clock, the oscillator clock, and the first stored stream data;
- outputting the oscillator clock, the first stored stream data, and the second stored stream data as a reference clock, first regenerated stream data, and second regenerated stream data;
- and
- recovering the stream clock in the panel self refresh mode using the reference clock, the first regenerated stream data, and the second regenerated stream data.
Dependencies are inferred from the claim text.