Memory imbalance prediction based cache management
AssigneeIntel Corporation
InventorsQiong Cai, Dyer Rolan, Blas Cuesta, Ferad Zyulkyarov, Serkan Ozdemir, Marios Nicolaides
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AssigneeIntel Corporation
InventorsQiong Cai, Dyer Rolan, Blas Cuesta, Ferad Zyulkyarov, Serkan Ozdemir, Marios Nicolaides
Estimating the term…
Embodiments of methods, apparatuses, and storage media for memory imbalance prediction-based cache memory management are disclosed herein. In one instance, the apparatus may include a memory controller associated with a memory having a plurality of storage units. The memory controller may include logic configured to determine whether the memory enters into an imbalance state based at least in part on a difference in numbers of pending access requests to different storage units, and cause an adjustment of replacement management of a cache memory, based at least in part on a result of the determination. Other embodiments may be described and/or claimed.
An apparatus comprising:
An apparatus, comprising:
At least one non-transitory computing device-readable storage medium having executable instructions that, in response to execution by a memory controller, cause the memory controller to:
A memory controller-implemented method comprising:
Dependencies are inferred from the claim text.