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US 9,286,180 B1Granted
Final result checking for system with pre-verified cores
AssigneeFreescale Semiconductor, Inc.
InventorsAditya Musunuri, Amol V. Bhinge
Life of this patent
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Abstract
Provided are a system and method for generating final result checking for a test case. A test case is executed for a coherent memory system having a processor core. An event log is generated for the processor core. The event log is analyzed. The test case for the core is annotated with a checker for performing expected data checking for physical addresses modified by the processor core.
Claims20
A method for generating final result checking for a test case, comprising:
- executing a test case by a coherent memory system having a processor core;
- generating an event log for the processor core in response to executing the test case;
- filtering the event log to extract instruction information;
- generating a checker from the instruction information;
- annotating the test case with the checker for performing expected data checking for physical addresses modified by the processor core;
- and
- executing the annotated test case by the coherent memory system, including performing the expected data checking for the physical addresses modified by the processor core.
4 more elements
A method for generating final result checking for a test case, comprising:
- executing a test case by a coherent memory system having a plurality of processor cores;
- generating an event log for each processor core in response to executing the test case;
- merging the event logs of the processor cores;
- filtering the event logs to extract memory change instruction information;
- selecting a processor core of the plurality of processor cores according to the merged event logs for performing the expected data checking;
- generating a checker from the event logs;
- annotating the test case with the checker for performing expected data checking for physical addresses modified by the selected processor core;
- and
- executing the annotated test case by the coherent memory system, including performing the expected data checking.
6 more elements
A verification system, comprising:
- a processor core that executes a test case for a coherent memory system;
- an event log analyzer that analyzes an event log generated for the processor core;
- and
- a test case annotation module that annotates the test case with a checker for performing expected data checking for physical addresses modified by the processor core.
1 more element
Dependencies are inferred from the claim text.