Achieving deterministic execution of time critical code sections in multi-core systems
AssigneeIntel Corporation
InventorsIan Betts, Alexander Komarov, Anton Langebner
Life of this patent
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Abstract
Systems and methods may provide for detecting a time critical code section associated with a real time processor core and suspending execution on a suspendable processor core in response to the time critical code section. Additionally, execution on the suspendable core may be resumed when the real time processor core reaches the end of the time critical code section. In one example, execution is suspended by issuing an inter-processor interrupt (IPI) from the real time core to the suspendable core, wherein execution may be resumed when the real time core conducts a write to a memory location that is monitored by the suspendable core during suspension of execution.
Claims28
A system comprising:
- a shared resource;
- a suspendable processor core coupled to the shared resource, the suspendable processor core including,
- a first suspend module to conduct a suspension of execution with respect to the suspendable processor core in response to a signal,
- a memory monitor to detect a write to a semaphore memory location of the suspendable processor core, and
- a first resume module to conduct a resumption of execution with respect to the suspendable processor core in response to the write;
- and
- a real time processor core coupled to the shared resource, the real time processor core including,
- a code monitor to detect a time critical code section associated with the real time processor core,
- a second suspend module to issue the signal to the suspendable processor core in response to the time critical code section, and
- a second resume module to conduct the write to the memory location associated with the semaphore condition in response to the real time processor core reaching an end of the time critical code section.
A method comprising:
- detecting a time critical code section associated with a real time processor core;
- initiating a suspension of execution with respect to a suspendable processor core in response to the time critical code section;
- initiating a resumption of execution with respect to the suspendable processor core in response to the real time processor core reaching an end of the time critical code section, wherein the real time processor core shares a resource with the suspendable processor core;
- conducting the suspension of execution with respect to the suspendable processor core in response to a signal from the real time processor core;
- detecting a write by the real time processor core to a semaphore memory location of the suspendable processor core;
- and
- conducting the resumption of execution with respect to the suspendable processor core in response to the write by the real time processor core to the memory location.
At least one non-transitory computer-readable medium comprising one or more instructions that when executed on a real time processor core configure the real time processor core to:
- detect a time critical code section associated with the real time processor core;
- initiate a suspension of execution with respect to a suspendable processor core in response to the time critical code section;
- initiate a resumption of execution with respect to the suspendable processor core in response to the real time processor core reaching an end of the time critical code section, wherein the real time processor core is to share a resource with the suspendable processor core;
- and
- write to a semaphore memory location of the suspendable processor core to initiate the resumption of execution.
At least one non-transitory computer-readable medium comprising one or more instructions that when executed on a suspendable processor core configure the suspendable processor core to:
- conduct a suspension of execution with respect to the suspendable processor core in response to a signal from a real time processor core, the signal being responsive to the real time processor core detecting a time critical code section associated with the real time processor core;
- detect a write by the real time processor core to a semaphore memory location of the suspendable processor core, the write being responsive to the real time processor core reaching an end of the time critical code section;
- and
- conduct a resumption of execution with respect to the suspendable processor core in response to the write by the real time processor core to the memory location, wherein the suspendable processor core is to share a resource with the real time processor core.
Dependencies are inferred from the claim text.