System and method for facilitating joint operation of multiple hypervisors in a computer system
AssigneeAO Kaspersky Lab
InventorsVyacheslav I. Levchenko, Igor Y. Kumagin
Life of this patent
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Abstract
In a computer system, joint operation of multiple hypervisors is coordinated. A persistent hypervisor and a non-persistent hypervisor are executed. The non-persistent hypervisor is executed in the supervisor mode according to an operating regime controlled by a scheduler engine, and the persistent hypervisor is executed in the hypervisor mode under the control of a handler engine. The handler engine monitors, and responds, to an attempted mode transition of the processor between the hypervisor and supervisor modes, and coordinates the suspension and resumption, as appropriate, of the persistent hypervisor.
Claims21
A system for coordinating joint operation of multiple hypervisors, the system comprising:
- a computing platform having a processor, data storage, and input/output facilities, the processor being switchable between a hypervisor mode and a supervisor mode, the hypervisor mode providing a higher privilege level than the supervisor mode, the computing platform containing instructions that, when executed by the computing platform, cause the computing platform to implement:
- a persistent hypervisor and a non-persistent hypervisor;
- a scheduler engine configured to coordinate operation of the non-persistent hypervisor in the supervisor mode;
- a handler engine configured to coordinate operation of the persistent hypervisor in the hypervisor mode such that:
- the handler engine monitors, and responds, to an attempted mode transition of the processor between the hypervisor and supervisor modes;
- in response to an attempted mode transition from the hypervisor mode to the supervisor mode, the handler engine suspends execution of the persistent hypervisor, including saving of a state of the processor, and transitions the processor to execute the non-persistent hypervisor in the supervisor mode;
- and
- wherein in response to a conclusion of execution of supervisor-mode instruction, the handler engine suspends execution of the non-persistent hypervisor, including saving of the processor state, and transitions the processor to execute the persistent hypervisor in the hypervisor mode, wherein the handler engine includes an interceptor engine configured to suspend execution of a processor mode change in response to a detection of an attempt to make such a mode change.
A method for coordinating joint operation of multiple hypervisors in a computing system having a processor that is switchable between a hypervisor mode and a supervisor mode, the hypervisor mode providing a higher privilege level than the supervisor mode, the method comprising:
- executing, by the computing system, a persistent hypervisor and a non-persistent hypervisor, the non-persistent hypervisor being executed in the supervisor mode according to an operating regime controlled by a scheduler engine;
- executing, by the computing system, a handler engine to coordinate operation of the persistent hypervisor in the hypervisor mode such that:
- the handler engine monitors, and responds, to an attempted mode transition of the processor between the hypervisor and supervisor modes;
- in response to an attempted mode transition from the hypervisor mode to the supervisor mode, the handler engine suspends execution of the persistent hypervisor, including saving of a state of the processor, and transitions the processor to execute the non-persistent hypervisor in the supervisor mode;
- and
- wherein in response to a conclusion of execution of supervisor-mode instruction, the handler engine suspends execution of the non-persistent hypervisor, including saving of the processor state, and transitions the processor to execute the persistent hypervisor in the hypervisor mode, wherein the handler engine suspends execution of a processor mode change in response to a detection of an attempt to make such a mode change.
A system for coordinating joint operation of multiple hypervisors in a computing system having a processor that is switchable between a hypervisor mode and a supervisor mode, the hypervisor mode providing a higher privilege level than the supervisor mode, the system comprising:
- means for executing a persistent hypervisor and a non-persistent hypervisor, the non-persistent hypervisor being executed in the supervisor mode according to an operating regime controlled by a scheduler engine;
- means for executing a handler engine to coordinate operation of the persistent hypervisor in the hypervisor mode such that:
- the handler engine monitors, and responds, to an attempted mode transition of the processor between the hypervisor and supervisor modes;
- in response to an attempted mode transition from the hypervisor mode to the supervisor mode, the handler engine suspends execution of the persistent hypervisor, including saving of a state of the processor, and transitions the processor to execute the non-persistent hypervisor in the supervisor mode;
- and
- wherein in response to a conclusion of execution of supervisor-mode instruction, the handler engine suspends execution of the non-persistent hypervisor, including saving of the processor state, and transitions the processor to execute the persistent hypervisor in the hypervisor mode, wherein the means for executing the handler engine suspends execution of a processor mode change in response to a detection of an attempt to make such a mode change.
Dependencies are inferred from the claim text.