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AssigneeQUALCOMM Incorporated
InventorsKishore Yalamanchili, Yogeshwar Narayanan Nagaraj, Rashmi Keshava Iyengar, Dilip Krishnaswamy, Rodolfo Giacomo Beraha
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Adaptive hardware reconfiguration of configurable co-processor cores for hardware optimization of functionality blocks based on use case prediction, and related methods, circuits, and computer-readable media are disclosed. In one embodiment, an indication of one or more applications for possible execution is received. Execution probabilities for respective ones of the one or more applications are received. One or more mappings of the one or more applications to one or more functionality blocks is accessed, and a net benefit of hardware reconfiguration of one or more configurable co-processor cores of a multicore central processing unit for the one or more functionality blocks is calculated based on the execution probabilities and the mappings. An optimal hardware reconfiguration is determined based on a current hardware configuration and the calculated net benefit. The configurable co-processor cores are reconfigured based on the optimal hardware reconfiguration.
A method of adaptive hardware reconfiguration of configurable co-processor cores of a multicore central processing unit (CPU) for hardware optimization of functionality blocks based on use case prediction, comprising:
An adaptive hardware reconfiguration circuit providing hardware optimization of functionality blocks based on use case prediction, the adaptive hardware reconfiguration circuit comprising:
A non-transitory computer-readable medium having stored thereon computer-executable instructions to cause a processor to implement a method for adaptive hardware reconfiguration of configurable co-processor cores of a multicore central processing unit (CPU) for hardware optimization of functionality blocks based on use case prediction, the method comprising:
Dependencies are inferred from the claim text.