Dopant etch selectivity control
AssigneeApplied Materials, Inc.
InventorsVinod R. Purayath, Anchuan Wang, Nitin K. Ingle
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AssigneeApplied Materials, Inc.
InventorsVinod R. Purayath, Anchuan Wang, Nitin K. Ingle
Estimating the term…
Methods of etching two doped silicon portions at two different etch rates are described. An n-type silicon portion may be etched faster than a p-type silicon portion when both are exposed and present on the same substrate. The n-type silicon portion may be doped with phosphorus and the p-type silicon portion may be doped with boron. In one example, the n-type silicon portion is single crystal silicon and the p-type silicon portion is polycrystalline silicon (a.k.a. polysilicon). The p-type silicon portion may be a polysilicon floating gate in a flash memory cell and may be located above a gate silicon oxide which, in turn, is above an n-type active area single crystal silicon portion. The additional trimming of the n-type active area silicon portion may reduce the accumulation of trapped charges during use and increase the lifespan of flash memory devices.
A method of etching a substrate, the method comprising:
A method of etching a patterned substrate, the method comprising:
Dependencies are inferred from the claim text.