Silicon wafer and manufacturing method thereof
AssigneeSumco Corporation
InventorsToshiaki Ono, Wataru Ito, Jun Fujise
Life of this patent
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Abstract
A method of manufacturing a silicon wafer provides a silicon wafer which can reduce the precipitation of oxygen to prevent a wafer deformation from being generated and can prevent a slip extension due to boat scratches and transfer scratches serving as a reason for a decrease in wafer strength, even when the wafer is provided to a rapid temperature-rising-and-falling thermal treatment process.
Claims8
A method of manufacturing a silicon epitaxial wafer which is provided to a semiconductor device manufacturing process having a thermal treatment process of which the highest temperature ranges from 1050° C. to the melting point of silicon and of which the temperature rising and falling rate ranges from 150° C./sec to 10000° C./sec, the method comprising:
- an epitaxial process of causing an epitaxial layer to grow on the surface of a substrate, which is doped with boron so as to have resistivity of 0.02 Ωcm to 1 kΩcm and of which the initial oxygen concentration Oi is in the range of 14.0×1017 to 22×1017 atoms/cm3 ASTM F 121, 1970-1979 published by American Society for Testing and Materials International);
- and
- an oxygen precipitation nuclei dissolution process of treating a wafer in the treatment temperature range of 1150° C. to 1300° C., the retention time range of 5 sec to 1 min, and the temperature-falling rate range of 10° C./sec to 0.1° C./sec,
- wherein the oxygen precipitation nuclei dissolution process is performed before or after the epitaxial process,
- the thermal treatment process is applied to only an outermost surface layer of the silicon epitaxial wafer,
- the oxygen precipitates density is equal to or less than 5×104 pcs/cm2 in the silicon epitaxial wafer, and
- the wafer includes a front surface and back surface, both having a flat main surface, a front sloped chamfered portion having an angle θ1, which is in a range of from 10° to 50°, a back sloped chamfered portion having an angle θ2, which is in a range of from 10° to 30°, and front and back curved portions, which connect the front and back chamfered portions to a peripheral edge of the wafer.
A method of manufacturing a silicon epitaxial wafer which is provided to a semiconductor device manufacturing process having a thermal treatment process of which the highest temperature ranges from 1050° C. to the melting point of silicon and of which the temperature rising and falling rate ranges from 150° C./sec to 10000° C./sec, the method comprising:
- an epitaxial process of causing an epitaxial layer to grow on the surface of a substrate, which is doped with nitrogen of 1×1013 to 5×1014 atoms/cm3;
- and
- an oxygen precipitation nuclei dissolution process of treating a wafer in the treatment temperature range of 1200° C. to 1300° C., the retention time range of 5 sec to 1 min, and the temperature-falling rate range of 10° C./sec to 0.1° C./sec after the epitaxial process,
- wherein the thermal treatment process is applied to only an outermost surface layer of the silicon epitaxial wafer,
- the oxygen precipitates density is equal to or less than 5×104 pcs/cm2 in the silicon epitaxial wafer, and
- the wafer includes a front surface and back surface, both having a flat main surface, a front sloped chamfered portion having an angle θ1, which is in a range of from 10° to 50°, a back sloped chamfered portion having an angle θ2, which is in a range of from 10° to 30°, and front and back curved portions, which connect the front and back chamfered portions to a peripheral edge of the wafer.
Dependencies are inferred from the claim text.