Electrically gated three-terminal circuits and devices based on spin hall torque effects in magnetic nanostructures apparatus, methods and applications

A magnetic tunneling junction memory device based on a three-terminal circuit configuration, comprising:

• an array of memory cells for storing data;
• and
• a memory control circuit coupled to the array of memory cells and operable to read or write data in the memory cells,
• wherein each memory cell includes:
• a magnetic tunneling junction (MTJ) that includes (1) a pinned magnetic layer having a fixed magnetization direction, (2) a free magnetic layer having a magnetization direction that is changeable, and (3) a non-magnetic junction layer between the magnetic free layer and the pinned magnetic layer and formed of an insulator material sufficiently thin to allow tunneling of electrons between the magnetic free layer and the pinned magnetic layer;
• a spin Hall effect metal layer that is nonmagnetic and includes a metal exhibiting a large spin Hall effect to react to a charge current directed into the spin Hall effect metal layer to produce a spin-polarized current that is perpendicular to the charge current, the spin Hall effect metal layer being parallel to and adjacent to the free magnetic layer to direct the spin-polarized current generated in the spin Hall effect metal layer into the free magnetic layer;
• a first electrical terminal in electrical contact with the MTJ from a side having the pinned magnetic layer to receive a gate voltage that modifies a current threshold of a spin-polarized current flowing across the MTJ for switching the magnetization of the free magnetic layer;
• and
• second and third electrical terminals in electrical contact with two contact locations of the spin Hall effect metal layer on two opposite sides of the free magnetic layer to supply the charge current in the spin Hall effect metal layer;
• and
• wherein the memory control circuit is coupled to the first, second and third electrical terminals to supply (1) the charge current via the second and third electrical terminals in the spin Hall effect metal layer and (2) the gate voltage across the MTJ causing a small current tunneling across the MTJ that is insufficient to switch the magnetization of the free magnetic layer without collaboration of the spin-polarized current flowing across the free magnetic layer caused by the charge current,
• wherein the memory control circuit is configured to be operable in a writing mode to simultaneously apply the charge current in the spin Hall effect metal layer and the gate voltage across the MTJ to set or switch the magnetization direction of the free magnetic layer to a desired direction for representing a stored bit, and
• wherein the memory control circuit is further configured to be operable in a read mode to apply a read voltage to the first electrical terminal to supply a read current tunneling across the MTJ between the first electrical terminal and the spin Hall effect metal layer, without switching the magnetization direction of the free magnetic layer, to sense the magnetization direction of the free magnetic layer that represents the stored bit in the MTJ.