Silicon carbide static induction transistor and process for making a silicon carbide static induction transistor

A method for fabricating a static induction transistor (SIT), comprising:

• growing a plurality of epitaxial gate regions on a silicon carbide substrate doped with a first conductivity type, wherein the plurality of epitaxial gate regions are in situ doped with a second conductivity type;
• growing a plurality of epitaxial channel regions positioned between adjacent epitaxial gate regions, wherein the plurality of epitaxial channel regions are in situ doped with the first conductivity type;
• and
• growing a plurality of epitaxial source regions on said plurality of epitaxial channel regions, wherein the plurality of epitaxial source regions are in situ doped with the first conductivity type.

A method for fabricating a static induction transistor (SIT), comprising:

• forming a plurality of first recessed regions in a top surface of a silicon carbide substrate doped with a first conductivity type;
• epitaxially growing a layer of silicon carbide on the top surface, said layer of silicon carbide in situ doped with a second conductivity type and having a plurality of second recessed regions aligned with the first recessed regions;
• filling the second recessed regions with a mask material to define a gate mask;
• etching the layer of silicon carbide using the gate mask to define a plurality of gate regions;
• epitaxially growing a plurality of channel regions positioned between adjacent gate regions and in situ doped with the first conductivity type;
• epitaxially growing a plurality of source regions on said plurality of channel regions and in situ doped with the first conductivity type;
• forming a first silicide contact to a back surface of the silicon carbide substrate;
• forming a second silicide contact to the plurality of source regions;
• and
• forming a third silicide contact to a gate lead electrically connected to the gate regions.