Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions

An electrical junction comprising a metal oxide barrier layer disposed between a contact metal and a group IV semiconductor, the semiconductor comprising a source or drain of a transistor, the barrier layer configured to reduce a height of a Schottky barrier between the contact metal and the semiconductor from that which would exist at a contact junction between the contact metal and the semiconductor without the barrier layer disposed therebetween, said Schottky barrier being less than that which would exist if a silicide of the contact metal were used as the barrier layer instead of the metal oxide interface layer.

An electrical junction, comprising a conductor;

• a semiconductor selected from a list consisting of Si, Ge, C (a crystal structure of which is selected from a list comprising a diamond lattice, a fulleride or a polymer), an alloy of Ge and Si, an alloy of Ge and C, an alloy of Si and C, and an alloy of Si, Ge, and C;
• and an interface layer disposed therebetween, the semiconductor comprising a source or drain of a transistor, and the interface layer comprising a metal oxide and having a thickness of approximately 0.1 nm to 5 nm.