Resource optimization by implementing multiple instances of a soft modem with a single microcontroller

A method for receiving and demodulating multiple analog signals comprising highway addressable remote transducer messages, said method comprising:

• providing a highway addressable remote transducer soft modem integrated within a single microcontroller, said single microcontroller configured to run a plurality of instances of said highway addressable remote transducer soft modem, wherein said highway addressable remote transducer soft modem is in operable communication with a plurality of analog to digital converters, a serial peripheral interface, and a parallel to serial converter in said single microcontroller, and wherein said analog to digital converters are configured to communicate with a plurality of sensor devices via a plurality of analog interfaces;
• receiving each of said analog signals comprising said highway addressable remote transducer messages by a phase coherent frequency shift keying demodulator of said highway addressable remote transducer soft modem;
• sampling and converting said received each of said analog signals into digitized analog samples by said phase coherent frequency shift keying demodulator at a predetermined digital sampling rate;
• processing said digitized analog samples by said phase coherent frequency shift keying demodulator for removing low frequency interfering signals from said digitized analog samples;
• comparing signal amplitude of said processed digitized analog samples with predetermined threshold values and applying a fast energy detect algorithm using an energy detector, by said phase coherent frequency shift keying demodulator for determining whether further signal processing of said processed digitized analog samples is required;
• reducing a clock speed of a central processing unit of said single microcontroller to a predetermined low frequency value by said phase coherent frequency shift keying demodulator, when sufficient energy is not detected in said processed digitized analog samples during said comparison;
• increasing said clock speed of said central processing unit of said single microcontroller to a predetermined high frequency value by said phase coherent frequency shift keying demodulator, when sufficient energy is detected in said processed digitized analog samples during said comparison;
• introducing a predetermined phase delay in said processed digitized analog samples by said phase coherent frequency shift keying demodulator for producing phase shifted digitized analog samples;
• demodulating said processed digitized analog samples to obtain a demodulated analog signal, by said phase coherent frequency shift keying demodulator, via phase discrimination by multiplying said processed digitized analog samples from said energy detector with said phase shifted digitized analog samples;
• removing second order frequencies in said demodulated digitized analog samples, by said phase coherent frequency shift keying demodulator;
• checking said demodulated digitized analog samples for a binary value, by said phase coherent frequency shift keying demodulator, wherein a positive demodulated digitized analog sample represents a 1 and a negative demodulated digitized analog sample represents a 0;
• and
• performing a bit shift operation and assembling an 11 bit character, by said phase coherent frequency shift keying demodulator, for character generation and bit synchronization of said demodulated analog signal.

A method for performing energy detection and determining speed of a clock of a central processing unit of a single microcontroller integrated with a highway addressable remote transducer soft modem, said single microcontroller configured to run a plurality of instances of said highway addressable remote transducer soft modem, said method comprising:

• receiving digitized analog samples from a high pass filter of a phase coherent frequency shift keying demodulator of said highway addressable remote transducer soft modem, by an energy detector of said phase coherent frequency shift keying demodulator;
• comparing signal amplitude of said received digitized analog samples with predetermined threshold values by said energy detector;
• detecting presence of a valid highway addressable remote transducer analog signal by said energy detector, when said comparison results in a value greater than said predetermined threshold values, and increasing said speed of said clock of said central processing unit to a predetermined high frequency value by said energy detector;
• setting an energy detect count value to a predetermined value and decrementing said energy detect count value, by said energy detector, when said signal amplitude of said received digitized analog samples is less than said predetermined threshold values;
• and
• detecting absence of said valid highway addressable remote transducer analog signal by said energy detector, when said energy detect count value is less than zero, and reducing said speed of said clock of said central processing unit by said energy detector for reducing power consumption of said central processing unit.