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US 9,197,216 B2Granted
Multiplexing for systems with multiple supply sources
AssigneeBroadcom Corporation
InventorDario Soltesz
Life of this patent
Estimating the term…
Abstract
A system includes an inverter element to gate forward current flow from a first signal source, and a reverse current inhibition element to block reverse current flow towards the first signal source from a second signal source.
Claims20
A method, comprising:
- applying a first control signal to an inverter element;
- applying a second control signal to a first transistor of a multiplexer;
- and
- applying the first control signal to a third transistor;
- in response to the second control signal, allowing signal flow across the first transistor;
- in response to the first control signal:
- passing a signal input to a gate of a second transistor of the multiplexer using the inverter;
- and
- restricting signal flow across the third transistor;
- and
- responsive to the signal input at the gate of the second transistor, restricting signal flow across the second transistor, the second transistor coupled to the first transistor in series, the third transistor coupled in parallel to the first and second transistors.
8 more elements
A circuit comprising;
- a first transistor;
- a second transistor connected in series with the first transistor, the first and second transistors situated in a mirrored configuration;
- a third transistor connected in parallel with the first and second transistors;
- and
- an inverter to, in a first mode, pass a input from a source and provide the input to a gate of the first transistor;
- and
- responsive to the second transistor receiving a control signal, the third transistor and the second transistor configured to switch the circuit between the first mode in which transmission is allowed between the source and an output and a second mode in which transmission is restricted.
4 more elements
A device, comprising:
- reverse current inhibition circuitry comprising:
- a first transistor;
- and
- a second transistor, the first and second transistors situated in series with one another;
- the reverse current inhibition circuitry configured to:
- block reverse current flow towards a first signal source from a second signal source when in a low power mode;
- and
- allow an input to flow from a source to an output when in an active mode;
- a third transistor coupled in parallel to the reverse current inhibition circuitry, the third transistor configured to:
- switch between a low power mode and the active mode responsive to a selection signal different from the input, the selection signal configured to distinguish between the low power mode and the active mode;
- restrict current flow in the low power mode;
- and
- allow current flow in the active mode;
- an inverter coupled to the reverse current inhibition circuitry, the inverter configured to:
- when the selection signal indicates the low power mode, pass the input to a gate of the first transistor to restrict signal flow across the first transistor;
- and
- when the selection signal indicates the active mode, allow signal flow across the first transistor;
- and
- control circuitry coupled to the inverter, the control circuitry configured to apply the selection signal to the inverter.
16 more elements
Dependencies are inferred from the claim text.