Stacked dual-chip packaging structure and preparation method thereof

A method for forming a stacked dual-chip package comprising the steps of:

• providing a lead frame, the lead frame comprises a base, a first pin and a second pin formed at a left side and a right side of the base respectively and a third pin and a fourth pin formed at a rear side or a front side of the base, the first pin extends along a direction parallel to the left side of the base and the second pin extends along a direction parallel to the left side of the base;
• flipping and attaching a first chip on the base, the first chip comprises a first electrode and a second electrode formed on its front surface and a back metal layer formed on its back surface, and a plurality of interconnection structures formed on the first electrode and second electrode, wherein the first chip is partially overlapped with the third pin defining an overlapping area on the first chip, interconnection structures formed on a first electrode are connected to a top surface of the base, and the second electrode of the first chip is connected to the third pin through an interconnection structure formed on the second electrode;
• providing a first interconnecting plate connecting the back metal layer of the first chip to a bonding strip of the first pin, the first interconnecting plate comprising a main plate portion attached on the back metal layer of the first chip;
• flipping and attaching a second chip on the first interconnecting plate, the second chip comprises a third electrode and a fourth electrode formed on its front surface, a back metal layer formed on its back surface, and a plurality of interconnection structures are formed on the third electrode and fourth
• electrode, wherein the second chip is partially overlapped with the fourth pin defining an overlapping area on the second chip, an interconnection structure formed on the third electrode at the front of the second chip is connected to a top surface of the first interconnecting plate, the fourth electrode formed at the front of the second chip is connected to the fourth pin through an interconnection structure formed on the fourth pin and comprising a stack of metal balls;
• providing a second interconnecting plate connecting the back metal layer of the second chip to a bonding strip of the second pin, the second interconnecting plate comprising a main plate portion attached on the back metal layer of the second chip.