Reading memory data
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsJui-Jen Wu, Shao-Yu Chou
Life of this patent
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsJui-Jen Wu, Shao-Yu Chou
Estimating the term…
A circuit includes one or more memory cells, a data line associated with the one or more memory cells, one or more reference cells, a reference data line associated with the one or more reference cells, a first circuit coupled to the reference data line and the data line, and a second circuit. The first circuit is configured to output a first logical value based on a voltage level of the data line upon occurrence of a voltage level of the reference data line reaching a trip point. The second circuit is configured to output a second logical value based on the voltage level on the data line prior to the occurrence of the voltage level of the reference data line reaching the trip point, and to output the first logical value after the occurrence of the voltage level of the reference data line reaching the trip point.
A circuit comprising:
A circuit comprising:
A method, comprising:
Dependencies are inferred from the claim text.