N factorial dual data rate clock and data recovery
AssigneeQUALCOMM Incorporated
InventorShoichiro Sengoku
Life of this patent
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AssigneeQUALCOMM Incorporated
InventorShoichiro Sengoku
Estimating the term…
System, methods and apparatus are described that facilitate transmission of data over a multi-wire data communications link, particularly between two devices within an electronic apparatus. Each symbol in a sequence of symbols received from a plurality of signal wires is received in an odd transmission interval or an even transmission interval. A first clock signal is generated from transitions in signaling state of the wires occurring between each odd transmission interval and a consecutive even transmission interval. A second clock signal is generated from transitions in signaling state of the plurality of wires occurring between each even transmission interval and a consecutive odd transmission interval. The first and second clock signals are used to capture symbols received in even and odd transmission intervals, respectively.
A method of data communications, comprising:
An apparatus, comprising:
A receiver, comprising:
A non-transitory processor-readable storage medium having one or more instructions which, when executed by at least one processing circuit, cause the at least one processing circuit to:
Dependencies are inferred from the claim text.
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Using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop:…
Arrangements for allocating sub-channels of the transmission path: allocation of signalling, i.e. of overhead other than pilot signals
Receiver details: preprocessing of received signal for synchronisation, e.g. by code conversion, pulse generation or edge detection
Speed or phase control by the received code signals, the signals containing no special synchronisation information: using the transitions of the…
About 7 years 6 months of term left · ends 14 Apr 2034 (estimated)
1. Field
The present disclosure relates generally to an interface between a host processor and a peripheral device such as a camera and, more particularly, to improving clock generation for double data rate data transfer on an N-wire communication interface.
2. Background
FIG. 1 depicts an apparatus employing a data link between integrated circuit (IC) devices that selectively operates according to one of plurality of available standards.
FIG. 2 illustrates a system architecture for an apparatus employing a data link between IC devices.
FIG. 3 illustrates an example of a basic N! multi-wire interface.
Various aspects are now described with reference to the drawings. In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of one or more aspects. It may be evident, however, that such aspect(s) may be practiced without these specific details.
As used in this application, the terms “component,” “module,” “system” and the like are intended to include a computer-related entity, such as, but not limited to hardware, firmware, a combination of hardware and software, software, or software in execution. For example, a component may be, but is not limited to being, a process running on a processor, a processor, an object, an executable, a thread of execution, a program and/or a computer. By way of illustration, both an application running on a computing device and the computing device can be a component. One or more components can reside within a process and/or thread of execution and a component may be localized on one computer and/or distributed between two or more computers. In addition, these components can execute from various computer readable media having various data structures stored thereon. The components may communicate by way of local and/or remote processes such as in accordance with a signal having one or more data packets, such as data from one component interacting with another component in a local system, distributed system, and/or across a network such as the Internet with other systems by way of the signal.
Moreover, the term “or” is intended to mean an inclusive “or” rather than an exclusive “or.” That is, unless specified otherwise, or clear from the context, the phrase “X employs A or B” is intended to mean any of the natural inclusive permutations. That is, the phrase “X employs A or B” is satisfied by any of the following instances: X employs A; X employs B; or X employs both A and B. In addition, the articles “a” and “an” as used in this application and the appended claims should generally be construed to mean “one or more” unless specified otherwise or clear from the context to be directed to a singular form.