Multimode base station and implementation method thereof
AssigneeHuawei Technologies Co., Ltd.
InventorWeidong Yu
Life of this patent
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Abstract
The present invention relates to a method includes: implementing, by the board in the BBU1, frequency synchronization between a system clock of the board in the BBU1 and a system clock of the board in the BBU0 by using a synchronous Ethernet clock that is output by the board in the BBU0; and implementing, by the board in the BBU1, time synchronization between the system clock of the board in the BBU1 and the system clock of the board in the BBU0 by using an IEEE1588 clock that is output by the board in the BBU0. The present invention can enable the multimode base station to support more standards.
Claims15
An implementation method of a multimode base station, wherein the multimode base station is at least integrated with a first baseband unit BBU0 and a second base band unit BBU1, wherein a board of at least one standard is overlaid in the BBU0 and the BBU1 each;
- and the board in the BBU0 and the board in the BBU1 each are connected to a common-mode radio frequency module through a communication interface, the method comprising:
- implementing, by a board in the BBU1, frequency synchronization between a system clock of the board in the BBU1 and a system clock of the board in the BBU0 by using a synchronous Ethernet clock that is output by a board in the BBU0;
- and
- implementing, by the board in the BBU1, time synchronization between the system clock of the board in the BBU1 and the system clock of the board in the BBU0 by using an IEEE1588 clock that is output by the board in the BBU0.
A multimode base station, wherein the multimode base station is at least integrated with a first baseband unit BBU0 and a second base band unit BBU1, wherein a board of at least one standard is overlaid in the BBU0 and the BBU1 each;
- and the board in the BBU0 and the board in the BBU1 each are connected to a common-mode radio frequency module through a common public radio interface, wherein:
- the board in the BBU0 is configured to output a synchronous Ethernet clock and an IEEE1588 clock to the board in the BBU1;
- and
- the board in the BBU1 is configured to implement frequency synchronization between a system clock of the board in the BBU1 and a system clock of the board in the BBU0 by using the synchronous Ethernet clock that is output by the board in the BBU0, and implement time synchronization between the system clock of the board in the BBU1 and the system clock of the board in the BBU0 by using the IEEE1588 clock that is output by the board in the BBU0.
Dependencies are inferred from the claim text.