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US 9,178,523 B2Granted
Circuitry and methods for use in mixed-signals circuitry
AssigneeSocionext Inc.
InventorsIan Juso Dedic, Gavin Lambertus Allen, Saul Darzy
Life of this patent
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Abstract
A switching circuit, comprising: a main switch having a control terminal; and a clock-path portion connected to the control terminal of the main switch to apply a driving clock signal thereto so as to drive the main switch, wherein the circuit is configured to controllably apply a biasing voltage to the clock-path portion so as to bias a voltage level of the driving clock signal as applied to the control terminal of the main switch.
Claims16
A switching circuit, comprising:
- a main switch having a control terminal;
- and
- a clock-path portion connected to the control terminal of the main switch to apply a driving clock signal thereto so as to drive the main switch, wherein:
- the circuit is configured to controllably apply a biasing voltage to the clock-path portion so as to bias a voltage level of the driving clock signal as applied to the control terminal of the main switch;
- the circuit is configured to apply the biasing voltage to the clock-path portion by controllably connecting the clock-path portion to a reference-voltage source;
- the circuit comprises an auxiliary switch connected between said clock-path portion and said reference-voltage source;
- the auxiliary switch has a control terminal connected to receive an auxiliary signal so as to control when the clock-path portion is connected to the reference-voltage source;
- the main switch and the auxiliary switch are field-effect transistors of opposite channel type;
- the auxiliary signal is an auxiliary clock signal;
- and
- the driving and auxiliary clock signals are complementary clock signals, so as to turn on the auxiliary switch and connect the clock-path portion to the reference-voltage source when the main switch turns on.
8 more elements
Switching circuitry comprising a plurality of switching circuits, wherein:
- each switching circuit comprises a main switch having a control terminal, and a clock-path portion connected to the control terminal of the main switch to apply a driving clock signal thereto so as to drive the main switch, wherein each switching circuit is configured to controllably apply a biasing voltage to its clock-path portion so as to bias a voltage level of its driving clock signal as applied to the control terminal of its main switch;
- the clock signals are clock signals of a set of time-interleaved clock signals;
- and
- the switching circuits are configured to bias the voltage level of the respective driving clock signals as applied to the control terminals of the respective main switches so that those main switches are driven in substantially the same way as one another.
1 more element
Dependencies are inferred from the claim text.