Establishing a thermal profile across a semiconductor chip

A semiconductor structure comprising:

• a first semiconductor chip comprising:
• a first substrate;
• first devices and second devices on said first substrate, each second device selectively controlling a corresponding first device such that said corresponding first device generates a predetermined amount of heat;
• a dielectric layer on said first devices and said second devices;
• and,
• conductors extending vertically through said dielectric layer to said first devices, respectively;
• a second semiconductor chip on said first semiconductor chip, said second semiconductor chip comprising:
• a second substrate having a first surface and a second surface opposite said first surface;
• a metal layer above said second surface;
• and,
• a via extending vertically through said second substrate from said metal layer to said first surface and being connected to a conductor,
• said metal layer, said via, said conductor and said first device being aligned vertically, and
• said metal layer and said first device being thermally coupled by said conductor and said via such that heat generated by said first device is conducted through said conductor and said via to said metal layer.

A semiconductor structure comprising:

• a first semiconductor chip comprising:
• a first substrate;
• a resistor and a transistor on said first substrate, said transistor selectively controlling said resistor such that said resistor generates a predetermined amount of heat;
• a dielectric layer on said resistor and said transistor;
• and,
• a conductor extending vertically through said dielectric layer to said resistor;
• a second semiconductor chip on said first semiconductor chip, said second semiconductor chip comprising:
• a second substrate having a first surface and a second surface opposite said first surface;
• a metal layer above said second surface;
• and,
• a through-silicon via extending vertically through said second substrate from said metal layer to said first surface and being connected to said conductor,
• said metal layer, said through-silicon via, said conductor and said resistor being aligned vertically, and
• said metal layer and said resistor being thermally coupled by said conductor and said via such that heat generated by said resistor is conducted through said conductor and said via to said metal layer.