Power source circuit including transistor with oxide semiconductor
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsYoshiaki Ito, Takuro Ohmaru
Life of this patent
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Abstract
An object is to reduce degradation of circuit operation and to reduce the area of the entire circuit. A power source circuit is provided with a first terminal to which first voltage is input; a second terminal to which second voltage is input; a comparator being connected to the first terminal and the second terminal and comparing the first voltage and the second voltage; a digital circuit averaging, integrating, and digital pulse width modulating a first digital signal output from the comparator; a PWM output driver amplifying a second digital signal output from the digital circuit; and a smoothing circuit smoothing the amplified second digital signal.
Claims22
A power source circuit comprising:
- a comparator configured to compare a first voltage and a second voltage;
- a digital arithmetic process circuit configured to average, integrate, and digital pulse width modulate a digital signal output from the comparator;
- a pulse width modulation output driver configured to amplify the digital signal output from the digital arithmetic process circuit;
- a smoothing circuit configured to smooth the digital signal output from the pulse width modulation output driver;
- and
- a DC-DC converter,
- wherein the DC-DC converter comprises a coil, a diode, and a transistor comprising an oxide semiconductor film,
- wherein a first wiring is electrically connected to the source electrode of the transistor,
- wherein a second wiring is electrically connected to the drain electrode of the transistor,
- wherein the gate electrode of the transistor is a same layer as the first wiring and the second wiring,
- wherein the oxide semiconductor film comprises a channel formation region, and
- wherein the oxide semiconductor film contains indium and zinc.
A power source circuit comprising:
- a comparator configured to compare a first voltage and a second voltage;
- a digital arithmetic process circuit configured to average, integrate, and digital pulse width modulate a digital signal output from the comparator;
- a pulse width modulation output driver configured to amplify the digital signal output from the digital arithmetic process circuit;
- and
- a smoothing circuit configured to smooth the digital signal output from the pulse width modulation output driver,
- wherein the comparator, the digital arithmetic process circuit, and the pulse width modulation output driver each comprise a transistor comprising an oxide semiconductor film, a source electrode, a drain electrode, a gate electrode, and a gate insulating film,
- wherein a first wiring is electrically connected to the source electrode,
- wherein a second wiring is electrically connected to the drain electrode,
- wherein the gate electrode is a same layer as the first wiring and the second wiring,
- wherein the oxide semiconductor film comprises a channel formation region, and
- wherein the oxide semiconductor film contains indium and zinc.
A power source circuit comprising:
- a comparator configured to compare a first voltage and a second voltage;
- an adder circuit configured to average a digital signal output from the comparator;
- an adder-subtractor circuit configured to integrate the digital signal;
- a count comparison circuit;
- a latch circuit;
- a pulse width modulation output driver configured to amplify the digital signal output from the latch circuit;
- a smoothing circuit configured to smooth the digital signal output from the pulse width modulation output driver;
- and
- a DC-DC converter,
- wherein the count comparison circuit and the latch circuit are configured to digital pulse width modulate the digital signal output from the adder-subtractor circuit,
- wherein the DC-DC converter comprises a coil, a diode, and a transistor comprising an oxide semiconductor film,
- wherein a first wiring is electrically connected to the source electrode of the transistor,
- wherein a second wiring is electrically connected to the drain electrode of the transistor,
- wherein the gate electrode of the transistor is a same layer as the first wiring and the second wiring,
- wherein the oxide semiconductor film comprises a channel formation region, and
- wherein the oxide semiconductor film contains indium and zinc.
A power source circuit comprising:
- a comparator configured to compare a first voltage and a second voltage;
- an adder circuit configured to average a digital signal output from the comparator;
- an adder-subtractor circuit configured to integrate the digital signal;
- a count comparison circuit;
- a latch circuit;
- a pulse width modulation output driver configured to amplify the digital signal output from the latch circuit;
- and
- a smoothing circuit configured to smooth the digital signal output from the pulse width modulation output driver,
- wherein the count comparison circuit and the latch circuit are configured to digital pulse width modulate the digital signal output from the adder-subtractor circuit,
- wherein the comparator, the adder circuit, the adder-subtractor circuit, the count comparison circuit, the latch circuit, and the pulse width modulation output driver each comprise a transistor comprising an oxide semiconductor film, a source electrode, a drain electrode, a gate electrode, and a gate insulating film,
- wherein a first wiring is electrically connected to the source electrode,
- wherein a second wiring is electrically connected to the drain electrode,
- wherein the gate electrode is a same layer as the first wiring and the second wiring,
- wherein the oxide semiconductor film comprises a channel formation region, and
- wherein the oxide semiconductor film contains indium and zinc.
Dependencies are inferred from the claim text.