Surface treatment to improve resistive-switching characteristics

#In recent years, flash memory has become the most common form of non-volatile memory, mostly because it permits high density of memory cells, maintains low manufacturing cost and is generally reliable as a form of secondary storage. Conventional flash memory, however, suffers from a defect in that it degrades the more often it is reprogrammed, a disadvantage that grows more prominent as memory density continues to increase. Additionally, conventional flash memory operates too slowly to be used as a general substitute for random access memory (RAM).

#Industry has therefore searched for other non-volatile alternatives to flash memory; some proposed devices are based on memory cells that are controlled to change their effective resistance, and thereby store information. These devices generally have not yet been widely commercialized owing to silicon processing variations (a) that cause some cells to fail, such that they cannot be properly set or reset and (b) that, for those cells which do not fail, create unacceptable variation in the stimuli needed to form (i.e., condition), set and reset those cells.

#Needed are non-volatile devices and structures that exhibit greater consistency in terms of their characteristics, as well as methods for making these devices. The present invention addresses these needs and provides further, related advantages.

#FIG. 1 is a cross-sectional diagram of a memory cell 101; the memory cell includes top and bottom electrodes 103 and 105, with a semiconductor device layer 107 therebetween, all mounted above a substrate 109. The semiconductor device layer includes a first region 111 that has been doped via ion implantation to create various defects to enhance multistable properties associated with the memory cell. These defects can be atomic vacancies created by atomic collisions with in-bound implanted ions, interstitial defects created by the generation of these atomic vacancies, interstitial defects generated by implanted ions that did not substitute into the atomic lattice, and/or ions that have been come to rest in a place that would usually by occupied by one of the atoms in the lattice (substitutional defects).

#FIG. 2 is a functional block diagram of a method 201 of fabricating a semiconductor device layer through steps of depositing the layer, driving ions into the layer, and conditioning the layer (e.g., to at least partially fill traps or defects in the layer).

#FIG. 3 is the first of a series of FIGS. used to illustrate the fabrication of a semiconductor device layer, such as the layer 107 from FIG. 1. FIG. 3 shows an electrode 305 and semiconductor device layer 307 that have each been deposited above a substrate 303. Although not depicted by FIG. 3, additional “optional” layers may also be deposited in between any of these layers, as desired for the particular implementation.

#The invention defined by the enumerated claims may be better understood by referring to the following detailed description, which should be read in conjunction with the accompanying drawings. This description of one or more particular embodiments, set out below to enable one to build and use various implementations of the invention or inventions set forth by the claims, is not intended to limit the enumerated claims, but to exemplify their application to certain methods and devices. The description set out below exemplifies (i) a method of fabricating a semiconductor device layer, namely, one that used ion doping and defect creation to improve device properties, and (ii) a device based on such a method, implemented for example as a memory device that is controlled to change resistive state and thus store information. The invention, however, may also be applied to other methods and devices as well.

#As exemplified by the accompanying FIGS., the present disclosure provides an improved semiconductor device layer suitable for use in a memory device based upon controlled change of resistance, and a method for making such a layer. More specifically, a surface treatment process may be used to create various defects in a semiconductor device layer in a predictable, controlled manner. These added defects, in turn, provide for better, tighter control over forming, set and reset voltages in multistable resistive memory devices, and thus lead to greater yield and more predictable operation. That is to say, the purpose of surface treatment is not to use ions to form conductive metal filaments, but rather to control the formation of defects within a semiconductor device layer so as to achieve both tighter tolerances associated with mechanisms that engender resistive state change and changes in the population, localization and qualities of the defects associated with mechanisms that engender resistive state change.

#One method presented below, exemplified by FIGS. 2-6, involves ion bombardment of a semiconductor device layer (e.g., a metallic oxide layer) to create these defects. The semiconductor layer is typically formed to be a crystalline or amorphous structure that will have a somewhat unpredictable, non-uniform and unrepeatable distribution of inherent defects. That is to say, it is believed these defects are associated with resistive state change, and that unpredictable distribution of these defects contributes in part to memory cells that either fail to set or reset, or that have undesirable variability in current or voltage needed to control or read those memory cells. Through better control over defect distribution and depth, for example, by using a surface treatment process to create additional defects in a controlled manner, over and above native defects already existing in the material, it is believed that more predicable memory cell operation can be achieved.