US 9,178,144 B1 · RRAM cell with bottom electrode

Abstract

The present disclosure relates to a resistive random access memory (RRAM) cell having a bottom electrode that provides for low leakage currents within the RRAM cell without using insulating sidewall spacers, and an associated method of formation. In some embodiments, the RRAM cell has a bottom electrode disposed over a lower metal interconnect layer surrounded by a lower inter-level dielectric (ILD) layer. A bottom dielectric layer is disposed over the lower metal interconnect layer and/or the lower ILD layer. A dielectric data storage layer having a variable resistance is located above the bottom dielectric layer and the bottom electrode, and a top electrode is disposed over the dielectric data storage layer. Placement of the dielectric data storage layer onto the bottom dielectric layer increases a leakage path distance between the bottom and top electrodes, and thereby provides for low leakage current for the RRAM cell.

Claims20

Dependent claims

A resistive random access memory (RRAM) cell, comprising:

a bottom electrode disposed over a lower metal interconnect layer surrounded by a lower inter-level dielectric (ILD) layer;
a bottom dielectric layer disposed over the lower metal interconnect layer or the lower ILD layer;
a dielectric data storage layer having a variable resistance, wherein a bottom surface of the dielectric data storage layer abuts top surfaces of the bottom dielectric layer and the bottom electrode;
and
a top electrode disposed over the dielectric data storage layer.

2 more elements

Dependencies are inferred from the claim text.

RRAM cell with bottom electrode

Life of this patent

RRAM cell with bottom electrode

Life of this patent

Abstract

Claims20