Memory elements using self-aligned phase change material layers and methods of manufacturing same
AssigneeMicron Technology, Inc.
InventorJun Liu
Life of this patent
Estimating the term…
Loading patent…
AssigneeMicron Technology, Inc.
InventorJun Liu
Estimating the term…
A memory element and method of forming the same. The memory element includes a first electrode within a via in a first dielectric material. An insulating material element is positioned over and in contact with the first electrode. A phase change material is positioned over the first electrode and in contact with sidewalls of the insulating material element. The phase change material has a first surface in contact with a surface of the first electrode and a surface of the first dielectric material. A second electrode is in contact with a second surface of the phase change material, which is opposite to the first surface.
A memory element comprising:
A memory element comprising:
Dependencies are inferred from the claim text.
Drawings are temporarily unavailable. Open the PDF at USPTO
From the US filing history. Foreign family members aren’t listed.
Shaping switching materials: by processes specially adapted for achieving sub-lithographic dimensions, e.g. using spacers
Resistance change memory devices, e.g. resistive RAM [ReRAM] devices: arrangements comprising multiple bistable or multi-stable switching…
Shaping switching materials: by etching of pre-deposited switching material layers, e.g. lithography
Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching: multistable…
Term ended 4 Apr 2026 (estimated)
The present invention relates to semiconductor devices, and in particular to phase change memory elements and methods of forming and using the same.
Non-volatile memories are important elements of integrated circuits due to their ability to maintain data absent a power supply. Phase change materials have been investigated for use in non-volatile memory cells. Phase change memory elements include phase change materials, such as chalcogenide alloys, which are capable of stably transitioning between amorphous and crystalline phases. Each phase exhibits a particular resistance state and the resistance states distinguish the logic values of the memory element. Specifically, an amorphous state exhibits a relatively high resistance, and a crystalline state exhibits a relatively low resistance.
A conventional phase change memory element 1, illustrated in FIGS. 1A and 1B, has a layer of phase change material 8 between first and second electrodes 2, 4, which are supported by a dielectric material 6. The phase change material 8 is set to a particular resistance state according to the amount of current applied by the first and second electrodes 2, 4. To obtain an amorphous state (FIG. 1B), a relatively high write current pulse (a reset pulse) is applied through the conventional phase change memory element 1 to melt at least a portion of the phase change material 8 covering the first electrode 2 for a first period of time. The current is removed and the phase change material 8 cools rapidly to a temperature below the crystallization temperature, which results in the portion of the phase change material 8 covering the first electrode 2 having the amorphous phase. To obtain a crystalline state (FIG. 1A), a lower current write pulse (a set pulse) is applied to the conventional phase change memory element 1 for a second period of time (typically longer in duration than the first period of time and crystallization time of amorphous phase change material) to heat the amorphous portion of the phase change material 8 to a temperature below its melting point, but above its crystallization temperature. This causes the amorphous portion of the phase change material 8 to re-crystallize to the crystalline phase that is maintained once the current is removed and the conventional phase change memory element 1 is cooled. The phase change memory element 1 is read by applying a read voltage which does not change the phase state of the phase change material 8.
The foregoing and other advantages and features of the invention will become more apparent from the detailed description of exemplary embodiments provided below with reference to the accompanying drawings in which:
FIGS. 1A-1B illustrate a conventional phase change memory element;
FIGS. 2A-2B illustrate partial cross-sectional and partial top-down views, respectively, of a phase change memory element constructed in accordance with an exemplary embodiment;
In the following detailed description, reference is made to various specific embodiments of the invention. These embodiments are described with sufficient detail to enable those skilled in the art to practice the invention. It is to be understood that other embodiments may be employed, and that various structural, logical and electrical changes may be made without departing from the spirit or scope of the invention.
The term “substrate” used in the following description may include any supporting structure including, but not limited to, a semiconductor substrate that has an exposed substrate surface. A semiconductor substrate should be understood to include silicon, silicon-on-insulator (SOI), silicon-on-sapphire (SOS), doped and undoped semiconductors, epitaxial layers of silicon supported by a base semiconductor foundation, and other semiconductor structures, including those made of semiconductors other than silicon. When reference is made to a semiconductor substrate or wafer in the following description, previous process steps may have been utilized to form regions or junctions in or over the base semiconductor or foundation. The substrate also need not be semiconductor-based, but may be any support structure suitable for supporting an integrated circuit, including, but not limited to, metals, alloys, glasses, polymers, ceramics, and any other supportive materials as is known in the art.
Exemplary embodiments of the invention provide phase change memory elements and methods of forming the same. An exemplary memory element includes a substrate supporting a first electrode. An insulating material element is positioned over the first electrode, and a phase change material layer is formed over the first electrode and surrounding the insulating material element such that the phase change material layer has a lower surface that is in electrical communication with the first electrode. The memory element also has a second electrode in electrical communication with an upper surface of the phase change material layer.