Wafer-level light emitting diode structure, light emitting diode chip, and method for forming the same

A method for fabricating a wafer-level light emitting diode structure, comprising:

• providing a growth substrate, wherein a first semiconductor layer, a light emitting layer, and a second semiconductor layer are sequentially disposed on the substrate;
• subjecting the first semiconductor layer, the light emitting layer, and the second semiconductor layer with a patterning process to form a plurality of first portions and a plurality of second portions, wherein each of the plurality of second portions has a stacked structure and each of the plurality of first portions has an extended portion of the first semiconductor layer, wherein the plurality of first portions overlap with predetermined cutting ranges;
• forming an first electrode on the extended portion of the first semiconductor layer in each of the plurality of first portions;
• forming a second electrode on the stacked structure in each of the plurality of second portions;
• measuring photoelectric properties of the wafer-level light emitting diode structure via the first electrode and the second electrode;
• and
• cutting the growth substrate along the predetermined cutting ranges, thus removing each first electrode and obtaining a plurality of light emitting diode chips.

A method for fabricating a wafer-level light emitting diode structure, comprising:

• providing a growth substrate, wherein a first semiconductor layer, a light emitting layer, and a second semiconductor layer are sequentially disposed on the substrate;
• subjecting the first semiconductor layer, the light emitting layer, and the second semiconductor layer with a patterning process to form a plurality of first depressed portions and a plurality of second depressed portions, wherein each of the plurality of second depressed portions has a stacked structure and each of the plurality of first depressed portions has an extended portion of the first semiconductor layer, wherein the plurality of first depressed portions overlap with predetermined cutting ranges;
• forming an first electrode on the extended portion of the first semiconductor layer in each of the plurality of first depressed portions;
• forming a second electrode on the stacked structure in each of the plurality of second depressed portions;
• measuring photoelectric properties of the wafer-level light emitting diode structure via the first electrode and the second electrode;
• and
• cutting the growth substrate along the predetermined cutting ranges, thus removing each first electrode and obtaining a plurality of light emitting diode chips.