Structure and method for FinFET device

A fin-like field-effect transistor (FinFET) device comprising:

• a substrate having an n-type fin-like field-effect transistor (NFET) region and a p-type fin-like field-effect transistor (PFET) region;
• a first fin structure over the substrate in the NFET region, the first fin structure including:
• an epitaxial silicon (Si) layer as its upper portion;
• and
• an epitaxial silicon germanium (SiGe), with a silicon germanium oxide (SiGeO) feature at its outer layer, as its lower portion;
• a liner wrapping around the SiGeO feature, and extending upwards to wrap around a lower portion of the Si layer;
• and
• a dielectric layer laterally proximate to an upper portion of the Si layer, wherein the upper Si layer includes a middle portion that is neither laterally proximate to the dielectric layer nor wrapped by the liner,
• a second fin structure over the substrate in the PFET region, the second fin structure including:
• an epitaxial SiGe layer as its upper portion;
• an epitaxial Si as its middle portion;
• and
• another epitaxial SiGe layer as its bottom portion;
• the liner wrapping around the lower SiGe layer and the middle Si layer, and extending upwards to wrap around a lower portion of the upper SiGe layer;
• and
• the dielectric layer laterally proximate to an upper portion of the upper SiGe layer, wherein the upper SiGe layer includes a middle portion that is neither laterally proximate to the dielectric layer nor wrapped by the liner.