Methods for forming a semiconductor arrangement with structures having different heights

A method for forming a semiconductor arrangement, comprising:

• forming a layer over a substrate;
• forming a photoresist mask over the layer, the photoresist mask comprising an open region and a protective region;
• performing a first etch whereby etchant is applied to a target region of the layer by way of the open region and is not applied to a second region of the layer due to the protective region;
• forming a first photoresist layer over the layer after the performing a first etch;
• forming a second photoresist layer over the first photoresist layer;
• patterning the second photoresist layer to form a second photoresist mask comprising a first photoresist mask portion and a second photoresist mask portion;
• and
• forming a first structure within the target region of the layer and forming a second structure within the second region of the layer, the second structure having a second height greater than a first height of the first structure due to the first etch, the first structure formed below the first photoresist mask portion and the second structure formed below the second photoresist mask portion.

A method for forming a semiconductor arrangement, comprising:

• forming one or more shallow trench isolation (STI) structures within a substrate;
• forming a dielectric layer over the substrate;
• forming a polysilicon layer over the one or more STI structures and the dielectric layer;
• forming a first photoresist layer over the polysilicon layer;
• patterning the first photoresist layer to form a first photoresist mask, the first photoresist mask comprising an open region and a protective region;
• performing a first etch whereby etchant is applied to a target region of the polysilicon layer by way of the open region and is not applied to a second region of the polysilicon layer due to the protective region to form an etched polysilicon layer;
• forming a second photoresist layer over the etched polysilicon layer;
• patterning the second photoresist layer to form a second photoresist mask comprising a first photoresist mask portion for defining an overlay alignment mark and a second photoresist mask portion for defining a gate structure;
• and
• performing a second etch using the second photoresist mask to form the overlay alignment mark and the gate structure within the etched polysilicon layer.