Semiconductor device
AssigneePS4 Luxco S.a.r.l.
InventorYoshihiro Takaishi
Life of this patent
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Abstract
A semiconductor device 100 includes a plurality of vertical transistors 50 provided to stand from a silicon substrate 1 and having a pillar lower diffusion layer 9 at their end portions on the silicon substrate 1 side, a metal contact plug 31 provided to stand from the silicon substrate 1 and connected to the pillar lower diffusion layer 9 of the plurality of vertical transistors 50, the plurality of vertical transistors 50 are uniformly arranged around the metal contact plug 31 and share the pillar lower diffusion layer 9 and the metal contact plug 31.
Claims19
A semiconductor device comprising:
- a plurality of vertical transistors provided to stand from a semiconductor substrate and comprising a diffusion layer at their end portions on the semiconductor substrate side;
- a conductive plug provided to stand from the semiconductor substrate and connected to the diffusion layer of the plurality of vertical transistors, the plurality of vertical transistors being uniformly arranged near the conductive plug and sharing the diffusion layer and the conductive plug;
- and
- a dummy pillar provided to stand from the semiconductor substrate and comprising, over a side surface of the dummy pillar, a power feed gate electrode connected to the gate electrodes of the plurality of vertical transistors.
A semiconductor device comprising:
- a plurality of semiconductor pillars provided to stand from a semiconductor substrate, each of the semiconductor pillars forming a channel;
- a gate insulating film and a gate electrode provided over a side surface of each of the semiconductor pillars;
- an upper diffusion layer provided at an upper end of each of the semiconductor pillars to serve as one of a source and a drain;
- a lower diffusion layer operatively coupled to a lower end of each of the semiconductor pillars to serve as the other of the source and the drain;
- and
- a lower diffusion layer side contact plug connected to the lower diffusion layer,
- wherein the semiconductor pillars share the lower diffusion layer and the lower diffusion layer side contact plug, and
- wherein the semiconductor pillars are uniformly arranged near the lower diffusion layer side contact plug.
A semiconductor device comprising:
- a semiconductor substrate with an active region provided on a surface of said semiconductor substrate;
- a plurality of vertical transistors provided in the active region so as to stand from the semiconductor substrate;
- a lower diffusion layer at end portions of each of said vertical transistors on the semiconductor substrate side;
- upper diffusion layers at opposite upper portions of each of said vertical transistors;
- a conductive plug provided to stand from the semiconductor substrate and connected to the lower diffusion layer of the plurality of vertical transistors, the plurality of vertical transistors being uniformly arranged near the conductive plug and sharing the upper diffusion layers and the lower diffusion layer so as to be connected in parallel to each other;
- and
- a dummy pillar provided to stand from the semiconductor substrate and comprising, over a side surface of the dummy pillar, a power feed gate electrode connected to the gate electrodes of the plurality of vertical transistors.
Dependencies are inferred from the claim text.