Methods of forming gate structures of semiconductor devices

A method of forming replacement gate structures for first and second devices, wherein said first device is a short channel device and said second device is a long channel device, comprising:

• forming a first gate cavity and a second gate cavity above a semiconductor substrate for said first and second devices, respectively, said first gate cavity being narrower than said second gate cavity;
• forming a bulk metal layer within said first and second gate cavities such that said bulk metal layer over-fills said first gate cavity and forms a liner layer of said bulk metal in said second gate cavity;
• forming a masking layer that covers a portion of said bulk metal liner layer in said second gate cavity while leaving a portion of said bulk metal liner layer in said second cavity and said bulk metal layer in said first cavity exposed;
• and
• performing at least one recess etching process to recess said bulk metal layer within said first gate cavity and said exposed portions of said bulk metal liner layer in said second gate cavity, said at least one recess etching process recessing said bulk metal layer within said first gate cavity to its final thickness and removing said exposed portions of said bulk metal liner layer in said second gate cavity.

A method of forming replacement gate structures for first and second devices, wherein said first device is a short channel device and said second device is a long channel device, comprising:

• forming a first gate cavity and a second gate cavity above a semiconductor substrate for said first and second devices, respectively, said first gate cavity being narrower than said second gate cavity;
• forming a bulk metal layer within said first and second gate cavities, said bulk metal layer filling said first gate cavity and lining said second gate cavity;
• forming a second metal layer within said second gate cavity, said second metal layer filling said second gate cavity;
• and
• performing at least one recess etching process to recess said bulk metal layer within said first and second gate cavities, said at least one recess etching process recessing said bulk metal layer within said first gate cavity to its final thickness, said at least one recess etching process selectively recessing said bulk metal layer lining said second gate cavity relative to said second metal layer.